| Message ID | 20190320100508.6950-1-leo.yan@linaro.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [v2] clk: hi3660: Mark clk_gate_ufs_subsys as critical | expand |
Hi Michael, Stephen, On Wed, Mar 20, 2019 at 06:05:08PM +0800, Leo Yan wrote: > clk_gate_ufs_subsys is a system bus clock, turning off it will > introduce lockup issue during system suspend flow. Let's mark > clk_gate_ufs_subsys as critical clock, thus keeps it on during > system suspend and resume. Could you pick up this patch? Or should I resend it? Thanks, Leo Yan > Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC") > Cc: stable@vger.kernel.org > Cc: Zhong Kaihua <zhongkaihua@huawei.com> > Cc: John Stultz <john.stultz@linaro.org> > Cc: Zhangfei Gao <zhangfei.gao@linaro.org> > Suggested-by: Dong Zhang <zhangdong46@hisilicon.com> > Signed-off-by: Leo Yan <leo.yan@linaro.org> > --- > drivers/clk/hisilicon/clk-hi3660.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c > index f40419959656..794eeff0d5d2 100644 > --- a/drivers/clk/hisilicon/clk-hi3660.c > +++ b/drivers/clk/hisilicon/clk-hi3660.c > @@ -163,8 +163,12 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = { > "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 17, 0, }, > { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2", > "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, }, > + /* > + * clk_gate_ufs_subsys is a system bus clock, mark it as critical > + * clock and keep it on for system suspend and resume. > + */ > { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus", > - CLK_SET_RATE_PARENT, 0x50, 21, 0, }, > + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0x50, 21, 0, }, > { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus", > CLK_SET_RATE_PARENT, 0x50, 28, 0, }, > { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus", > -- > 2.17.1 >
Quoting Leo Yan (2019-04-17 22:33:39) > Hi Michael, Stephen, > > On Wed, Mar 20, 2019 at 06:05:08PM +0800, Leo Yan wrote: > > clk_gate_ufs_subsys is a system bus clock, turning off it will > > introduce lockup issue during system suspend flow. Let's mark > > clk_gate_ufs_subsys as critical clock, thus keeps it on during > > system suspend and resume. > > Could you pick up this patch? Or should I resend it? > I can pick it up. Is it critical or can it wait for v5.2?
On Thu, Apr 18, 2019 at 02:52:44PM -0700, Stephen Boyd wrote: > Quoting Leo Yan (2019-04-17 22:33:39) > > Hi Michael, Stephen, > > > > On Wed, Mar 20, 2019 at 06:05:08PM +0800, Leo Yan wrote: > > > clk_gate_ufs_subsys is a system bus clock, turning off it will > > > introduce lockup issue during system suspend flow. Let's mark > > > clk_gate_ufs_subsys as critical clock, thus keeps it on during > > > system suspend and resume. > > > > Could you pick up this patch? Or should I resend it? > > > > I can pick it up. Is it critical or can it wait for v5.2? It's fine to wait for v5.2. Thanks, Leo Yan
Quoting Leo Yan (2019-03-20 03:05:08) > clk_gate_ufs_subsys is a system bus clock, turning off it will > introduce lockup issue during system suspend flow. Let's mark > clk_gate_ufs_subsys as critical clock, thus keeps it on during > system suspend and resume. > > Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC") > Cc: stable@vger.kernel.org > Cc: Zhong Kaihua <zhongkaihua@huawei.com> > Cc: John Stultz <john.stultz@linaro.org> > Cc: Zhangfei Gao <zhangfei.gao@linaro.org> > Suggested-by: Dong Zhang <zhangdong46@hisilicon.com> > Signed-off-by: Leo Yan <leo.yan@linaro.org> > --- Applied to clk-next
On Fri, Apr 19, 2019 at 03:20:42PM -0700, Stephen Boyd wrote: > Quoting Leo Yan (2019-03-20 03:05:08) > > clk_gate_ufs_subsys is a system bus clock, turning off it will > > introduce lockup issue during system suspend flow. Let's mark > > clk_gate_ufs_subsys as critical clock, thus keeps it on during > > system suspend and resume. > > > > Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC") > > Cc: stable@vger.kernel.org > > Cc: Zhong Kaihua <zhongkaihua@huawei.com> > > Cc: John Stultz <john.stultz@linaro.org> > > Cc: Zhangfei Gao <zhangfei.gao@linaro.org> > > Suggested-by: Dong Zhang <zhangdong46@hisilicon.com> > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > > --- > > Applied to clk-next Thanks!
diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index f40419959656..794eeff0d5d2 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -163,8 +163,12 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = { "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 17, 0, }, { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2", "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, }, + /* + * clk_gate_ufs_subsys is a system bus clock, mark it as critical + * clock and keep it on for system suspend and resume. + */ { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus", - CLK_SET_RATE_PARENT, 0x50, 21, 0, }, + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0x50, 21, 0, }, { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus", CLK_SET_RATE_PARENT, 0x50, 28, 0, }, { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
clk_gate_ufs_subsys is a system bus clock, turning off it will introduce lockup issue during system suspend flow. Let's mark clk_gate_ufs_subsys as critical clock, thus keeps it on during system suspend and resume. Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC") Cc: stable@vger.kernel.org Cc: Zhong Kaihua <zhongkaihua@huawei.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Suggested-by: Dong Zhang <zhangdong46@hisilicon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> --- drivers/clk/hisilicon/clk-hi3660.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)