| Message ID | 1556265512-9130-7-git-send-email-yibin.gong@nxp.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | add ecspi ERR009165 for i.mx6/7 soc family | expand |
Am Freitag, den 26.04.2019, 08:05 +0000 schrieb Robin Gong: > Change to XCH mode even in dma mode, please refer to the below > errata: > https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf > > Signed-off-by: Robin Gong <yibin.gong@nxp.com> > --- > drivers/spi/spi-imx.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c > index 09c9a1e..eb56eac 100644 > --- a/drivers/spi/spi-imx.c > +++ b/drivers/spi/spi-imx.c > @@ -585,8 +585,9 @@ static int mx51_ecspi_prepare_transfer(struct > spi_imx_data *spi_imx, > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); > spi_imx->spi_bus_clk = clk; > > + /* ERR009165: work in XHC mode as PIO */ > if (spi_imx->usedma) > - ctrl |= MX51_ECSPI_CTRL_SMC; > + ctrl &= ~MX51_ECSPI_CTRL_SMC; > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); > > @@ -612,12 +613,14 @@ static int mx51_ecspi_prepare_transfer(struct > spi_imx_data *spi_imx, > > static void mx51_setup_wml(struct spi_imx_data *spi_imx) > { > + u32 tx_wml = 0; > + With a wml of 0 you might set the maxburst of the TX dma channel to fifosize to minimize the performance impact of this workaround. Regards, Lucas > /* > * Configure the DMA register: setup the watermark > * and enable DMA request. > */ > writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | > - MX51_ECSPI_DMA_TX_WML(spi_imx->wml) | > + MX51_ECSPI_DMA_TX_WML(tx_wml) | > MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | > MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN | > MX51_ECSPI_DMA_RXTDEN, spi_imx->base + > MX51_ECSPI_DMA); > @@ -1265,10 +1268,6 @@ static int spi_imx_sdma_init(struct device > *dev, struct spi_imx_data *spi_imx, > { > int ret; > > - /* use pio mode for i.mx6dl chip TKT238285 */ > - if (of_machine_is_compatible("fsl,imx6dl")) > - return 0; > - > spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; > > /* Prepare for TX DMA: */ > -- > 2.7.4 >
On 2019-04-26 at 11:07 +0200, Lucas Stach wrote: > > Am Freitag, den 26.04.2019, 08:05 +0000 schrieb Robin Gong: > > static void mx51_setup_wml(struct spi_imx_data *spi_imx) > > { > > + u32 tx_wml = 0; > > + > With a wml of 0 you might set the maxburst of the TX dma channel to > fifosize to minimize the performance impact of this workaround. > > Regards, > Lucas Unfortunately, this is a MUST part of errata which cause performance drop.
Am Freitag, den 26.04.2019, 09:22 +0000 schrieb Robin Gong: > On 2019-04-26 at 11:07 +0200, Lucas Stach wrote: > > > > Am Freitag, den 26.04.2019, 08:05 +0000 schrieb Robin Gong: > > > static void mx51_setup_wml(struct spi_imx_data *spi_imx) > > > { > > > + u32 tx_wml = 0; > > > + > > > > With a wml of 0 you might set the maxburst of the TX dma channel to > > fifosize to minimize the performance impact of this workaround. > > > > Regards, > > Lucas > > Unfortunately, this is a MUST part of errata which cause performance > drop. I'm not talking about changing the WML, but when the WML must be 0 you can safely increase the DMA burst size without overflowing the FIFO, which might recover some of of the performance loss. Regards, Lucas
On 2019-04-26 at 11:37 +0200, Lucas Stach wrote: > Am Freitag, den 26.04.2019, 09:22 +0000 schrieb Robin Gong: > > > > On 2019-04-26 at 11:07 +0200, Lucas Stach wrote: > > > > > > > > > Am Freitag, den 26.04.2019, 08:05 +0000 schrieb Robin Gong: > > > > > > > > static void mx51_setup_wml(struct spi_imx_data *spi_imx) > > > > { > > > > + u32 tx_wml = 0; > > > > + > > > With a wml of 0 you might set the maxburst of the TX dma channel > > > to > > > fifosize to minimize the performance impact of this workaround. > > > > > > Regards, > > > Lucas > > Unfortunately, this is a MUST part of errata which cause > > performance > > drop. > I'm not talking about changing the WML, but when the WML must be 0 > you > can safely increase the DMA burst size without overflowing the FIFO, > which might recover some of of the performance loss. > > Regards, > Lucas Good point, will add it in V3, thanks.
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 09c9a1e..eb56eac 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -585,8 +585,9 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); spi_imx->spi_bus_clk = clk; + /* ERR009165: work in XHC mode as PIO */ if (spi_imx->usedma) - ctrl |= MX51_ECSPI_CTRL_SMC; + ctrl &= ~MX51_ECSPI_CTRL_SMC; writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); @@ -612,12 +613,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, static void mx51_setup_wml(struct spi_imx_data *spi_imx) { + u32 tx_wml = 0; + /* * Configure the DMA register: setup the watermark * and enable DMA request. */ writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | - MX51_ECSPI_DMA_TX_WML(spi_imx->wml) | + MX51_ECSPI_DMA_TX_WML(tx_wml) | MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN | MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); @@ -1265,10 +1268,6 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx, { int ret; - /* use pio mode for i.mx6dl chip TKT238285 */ - if (of_machine_is_compatible("fsl,imx6dl")) - return 0; - spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; /* Prepare for TX DMA: */
Change to XCH mode even in dma mode, please refer to the below errata: https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf Signed-off-by: Robin Gong <yibin.gong@nxp.com> --- drivers/spi/spi-imx.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)