| Message ID | 1555513175-7596-6-git-send-email-olekstysh@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Renesas Stout board support (R-Car Gen2) | expand |
Hi Oleksandr, On 17/04/2019 15:59, Oleksandr Tyshchenko wrote: > From: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> > > This patch makes possible to use existing early prink code > for Renesas "Stout" board based on R-Car H2 SoC (SCIFA). > > The "EARLY_PRINTK_VERSION" for that board should be 'A': > CONFIG_EARLY_PRINTK=scif,0xe6c40000,A > > Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> > CC: Julien Grall <julien.grall@arm.com> > > --- > Changes in v3: > - It was decided not to introduce new debug-scifa.inc > for handling SCIFA interface, but to extend existing > debug-scif.inc for handling both interfaces. > This patch is a result of splitting an initial patch > "xen/arm: Add SCIFA UART support for early printk" > and only adds a support. > > Changes in v4: > - Drop SCIF(A) from comments > --- > xen/arch/arm/arm32/debug-scif.inc | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/arm32/debug-scif.inc b/xen/arch/arm/arm32/debug-scif.inc > index a8d2eae..3f01c90 100644 > --- a/xen/arch/arm/arm32/debug-scif.inc > +++ b/xen/arch/arm/arm32/debug-scif.inc > @@ -1,7 +1,7 @@ > /* > * xen/arch/arm/arm32/debug-scif.inc > * > - * SCIF specific debug code > + * SCIF(A) specific debug code > * > * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com> > * Copyright (C) 2014, Globallogic. > @@ -22,10 +22,13 @@ > #ifdef EARLY_PRINTK_VERSION_NONE > #define STATUS_REG SCIF_SCFSR > #define TX_FIFO_REG SCIF_SCFTDR > +#elif EARLY_PRINTK_VERSION_A > +#define STATUS_REG SCIFA_SCASSR > +#define TX_FIFO_REG SCIFA_SCAFTDR > #endif > > /* > - * SCIF UART wait UART to be ready to transmit > + * Wait UART to be ready to transmit This change and ... > * rb: register which contains the UART base address > * rc: scratch register > */ > @@ -37,7 +40,7 @@ > .endm > > /* > - * SCIF UART transmit character > + * UART transmit character ... this one look like more a change for the previous than this one. > * rb: register which contains the UART base address > * rt: register which contains the character to transmit > */ > Cheers,
On 29.04.19 17:30, Julien Grall wrote: > Hi Oleksandr, Hi, Julien >> @@ -22,10 +22,13 @@ >> #ifdef EARLY_PRINTK_VERSION_NONE >> #define STATUS_REG SCIF_SCFSR >> #define TX_FIFO_REG SCIF_SCFTDR >> +#elif EARLY_PRINTK_VERSION_A >> +#define STATUS_REG SCIFA_SCASSR >> +#define TX_FIFO_REG SCIFA_SCAFTDR >> #endif >> /* >> - * SCIF UART wait UART to be ready to transmit >> + * Wait UART to be ready to transmit > > This change and ... > >> * rb: register which contains the UART base address >> * rc: scratch register >> */ >> @@ -37,7 +40,7 @@ >> .endm >> /* >> - * SCIF UART transmit character >> + * UART transmit character > > ... this one look like more a change for the previous than this one. agree, will move to previous patch.
diff --git a/xen/arch/arm/arm32/debug-scif.inc b/xen/arch/arm/arm32/debug-scif.inc index a8d2eae..3f01c90 100644 --- a/xen/arch/arm/arm32/debug-scif.inc +++ b/xen/arch/arm/arm32/debug-scif.inc @@ -1,7 +1,7 @@ /* * xen/arch/arm/arm32/debug-scif.inc * - * SCIF specific debug code + * SCIF(A) specific debug code * * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com> * Copyright (C) 2014, Globallogic. @@ -22,10 +22,13 @@ #ifdef EARLY_PRINTK_VERSION_NONE #define STATUS_REG SCIF_SCFSR #define TX_FIFO_REG SCIF_SCFTDR +#elif EARLY_PRINTK_VERSION_A +#define STATUS_REG SCIFA_SCASSR +#define TX_FIFO_REG SCIFA_SCAFTDR #endif /* - * SCIF UART wait UART to be ready to transmit + * Wait UART to be ready to transmit * rb: register which contains the UART base address * rc: scratch register */ @@ -37,7 +40,7 @@ .endm /* - * SCIF UART transmit character + * UART transmit character * rb: register which contains the UART base address * rt: register which contains the character to transmit */