Message ID | 20190513130507.22533-1-jbrunet@baylibre.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | f52bc6dde8e79f216d7dbbb4fd933a48aacbe74e |
Headers | show |
Series | arm64: dts: meson: nanopi k2: add sd DDR50 | expand |
On Mon, May 13, 2019 at 3:05 PM Jerome Brunet <jbrunet@baylibre.com> wrote: > > Add UHS ddr50 mode to the nanopi k2 > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> since I'm curious: is this due to your recent meson-gx-mmc patches? this is the first board where we enable the UHS DDR50 mode Martin
Jerome Brunet <jbrunet@baylibre.com> writes: > Add UHS ddr50 mode to the nanopi k2 > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Queued for v5.3, Thanks, Kevin
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index be81f8958717..849c01650c4d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -301,6 +301,7 @@ sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; + sd-uhs-ddr50; max-frequency = <100000000>; disable-wp;
Add UHS ddr50 mode to the nanopi k2 Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 1 + 1 file changed, 1 insertion(+)