| Message ID | 20190516162942.154823-1-mka@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/3] ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degC | expand |
Hi, On Thu, May 16, 2019 at 9:29 AM Matthias Kaehlcke <mka@chromium.org> wrote: > This value matches what is used by the downstream Chrome OS 3.14 > kernel, the 'official' kernel for veyron devices. Keep the temperature > for 'speedy' at 90°C, as in the downstream kernel. > > Increase the temperature for a hardware shutdown to 125°C, which > matches the downstream configuration and gives the system a chance > to shut down orderly at the criticial trip point. > > Signed-off-by: Matthias Kaehlcke <mka@chromium.org> > --- > Changes in v2: > - patch added to the series > --- > arch/arm/boot/dts/rk3288-veyron-speedy.dts | 4 ++++ > arch/arm/boot/dts/rk3288-veyron.dtsi | 5 +++++ > 2 files changed, 9 insertions(+) Reviewed-by: Douglas Anderson <dianders@chromium.org>
Am Donnerstag, 16. Mai 2019, 18:29:40 CEST schrieb Matthias Kaehlcke: > This value matches what is used by the downstream Chrome OS 3.14 > kernel, the 'official' kernel for veyron devices. Keep the temperature > for 'speedy' at 90°C, as in the downstream kernel. > > Increase the temperature for a hardware shutdown to 125°C, which > matches the downstream configuration and gives the system a chance > to shut down orderly at the criticial trip point. > > Signed-off-by: Matthias Kaehlcke <mka@chromium.org> applied all 3 for 5.3 with Doug's RB and did a small fix to the commit message of patch2 ("thorse"). Thanks Heiko
diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts index e16421d80d22..ab2a66aa337e 100644 --- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts +++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts @@ -64,6 +64,10 @@ temperature = <70000>; }; +&cpu_crit { + temperature = <90000>; +}; + &edp { /delete-property/pinctrl-names; /delete-property/pinctrl-0; diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 192dbc089ade..58dc538b5df3 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -99,6 +99,10 @@ cpu0-supply = <&vdd_cpu>; }; +&cpu_crit { + temperature = <100000>; +}; + /* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */ &cpu_opp_table { /delete-node/ opp-312000000; @@ -371,6 +375,7 @@ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-temp = <125000>; }; &uart0 {
This value matches what is used by the downstream Chrome OS 3.14 kernel, the 'official' kernel for veyron devices. Keep the temperature for 'speedy' at 90°C, as in the downstream kernel. Increase the temperature for a hardware shutdown to 125°C, which matches the downstream configuration and gives the system a chance to shut down orderly at the criticial trip point. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> --- Changes in v2: - patch added to the series --- arch/arm/boot/dts/rk3288-veyron-speedy.dts | 4 ++++ arch/arm/boot/dts/rk3288-veyron.dtsi | 5 +++++ 2 files changed, 9 insertions(+)