| Message ID | 20190520104708.11980-5-nsaenzjulienne@suse.de (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
| Series | cpufreq support for the Raspberry Pi | expand |
Hi Nicolas, On 20.05.19 12:47, Nicolas Saenz Julienne wrote: > The four CPUs share a same clock source called pllb_arm. The clock can > be scaled through the raspberrypi firmware interface. do you see a problem with applying this also to bcm2835.dtsi and bcm2836.dtsi?
On Mon, 2019-05-20 at 14:19 +0200, Stefan Wahren wrote: > Hi Nicolas, > > On 20.05.19 12:47, Nicolas Saenz Julienne wrote: > > The four CPUs share a same clock source called pllb_arm. The clock can > > be scaled through the raspberrypi firmware interface. > do you see a problem with applying this also to bcm2835.dtsi and > bcm2836.dtsi? Not at all. I just need to test it first.
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi index beb6c502dadc..a8fea6696b42 100644 --- a/arch/arm/boot/dts/bcm2837.dtsi +++ b/arch/arm/boot/dts/bcm2837.dtsi @@ -44,6 +44,8 @@ reg = <0>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000d8>; + clocks = <&clocks BCM2835_PLLB_ARM>; + clock-names = "pllb_arm"; }; cpu1: cpu@1 { @@ -52,6 +54,8 @@ reg = <1>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e0>; + clocks = <&clocks BCM2835_PLLB_ARM>; + clock-names = "pllb_arm"; }; cpu2: cpu@2 { @@ -60,6 +64,8 @@ reg = <2>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e8>; + clocks = <&clocks BCM2835_PLLB_ARM>; + clock-names = "pllb_arm"; }; cpu3: cpu@3 { @@ -68,6 +74,8 @@ reg = <3>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000f0>; + clocks = <&clocks BCM2835_PLLB_ARM>; + clock-names = "pllb_arm"; }; }; };
The four CPUs share a same clock source called pllb_arm. The clock can be scaled through the raspberrypi firmware interface. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> --- arch/arm/boot/dts/bcm2837.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)