| Message ID | 1559119921-6098-1-git-send-email-bmeng.cn@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: virt: Correct pci "bus-range" encoding | expand |
On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > The largest pci bus number should be calculated from ECAM size, > instead of its base address. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> This seems ok, can you maybe explain what this fixes? Alistair > --- > > hw/riscv/virt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b3..d6132d9 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -299,7 +299,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, > qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci"); > qemu_fdt_setprop_cell(fdt, nodename, "linux,pci-domain", 0); > qemu_fdt_setprop_cells(fdt, nodename, "bus-range", 0, > - memmap[VIRT_PCIE_ECAM].base / > + memmap[VIRT_PCIE_ECAM].size / > PCIE_MMCFG_SIZE_MIN - 1); > qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0); > qemu_fdt_setprop_cells(fdt, nodename, "reg", 0, memmap[VIRT_PCIE_ECAM].base, > -- > 2.7.4 > >
Hi Alistair, On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote: > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > The largest pci bus number should be calculated from ECAM size, > > instead of its base address. > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > > This seems ok, can you maybe explain what this fixes? > The logic is wrong, as the commit message said. With current wrong logic, the largest pci bus number encoded in "bus-ranges" property was wrongly set to 0x2ff in this case. Per pci spec, the bus number should not exceed 0xff. Regards, Bin
On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > Hi Alistair, > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote: > > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > The largest pci bus number should be calculated from ECAM size, > > > instead of its base address. > > > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > > > > This seems ok, can you maybe explain what this fixes? > > > > The logic is wrong, as the commit message said. With current wrong > logic, the largest pci bus number encoded in "bus-ranges" property was > wrongly set to 0x2ff in this case. Per pci spec, the bus number should > not exceed 0xff. > Ping?
On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > Hi Alistair, > > > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote: > > > > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > > > The largest pci bus number should be calculated from ECAM size, > > > > instead of its base address. > > > > > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > > > > > > This seems ok, can you maybe explain what this fixes? > > > > > > > The logic is wrong, as the commit message said. With current wrong > > logic, the largest pci bus number encoded in "bus-ranges" property was > > wrongly set to 0x2ff in this case. Per pci spec, the bus number should > > not exceed 0xff. > > > > Ping? Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair
Hi, On Fri, Jun 7, 2019 at 2:46 AM Alistair Francis <alistair23@gmail.com> wrote: > > On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > Hi Alistair, > > > > > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote: > > > > > > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > > > > > The largest pci bus number should be calculated from ECAM size, > > > > > instead of its base address. > > > > > > > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > > > > > > > > This seems ok, can you maybe explain what this fixes? > > > > > > > > > > The logic is wrong, as the commit message said. With current wrong > > > logic, the largest pci bus number encoded in "bus-ranges" property was > > > wrongly set to 0x2ff in this case. Per pci spec, the bus number should > > > not exceed 0xff. > > > > > > > Ping? > > Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Can this go in the 4.1 PR? Regards, Bin
On Tue, 25 Jun 2019 18:47:33 PDT (-0700), bmeng.cn@gmail.com wrote: > Hi, > > On Fri, Jun 7, 2019 at 2:46 AM Alistair Francis <alistair23@gmail.com> wrote: >> >> On Thu, Jun 6, 2019 at 5:55 AM Bin Meng <bmeng.cn@gmail.com> wrote: >> > >> > On Thu, May 30, 2019 at 11:36 AM Bin Meng <bmeng.cn@gmail.com> wrote: >> > > >> > > Hi Alistair, >> > > >> > > On Thu, May 30, 2019 at 11:14 AM Alistair Francis <alistair23@gmail.com> wrote: >> > > > >> > > > On Wed, May 29, 2019 at 1:52 AM Bin Meng <bmeng.cn@gmail.com> wrote: >> > > > > >> > > > > The largest pci bus number should be calculated from ECAM size, >> > > > > instead of its base address. >> > > > > >> > > > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> > > > >> > > > This seems ok, can you maybe explain what this fixes? >> > > > >> > > >> > > The logic is wrong, as the commit message said. With current wrong >> > > logic, the largest pci bus number encoded in "bus-ranges" property was >> > > wrongly set to 0x2ff in this case. Per pci spec, the bus number should >> > > not exceed 0xff. >> > > >> > >> > Ping? >> >> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> > > Can this go in the 4.1 PR? This one I didn't miss, it's been in the queue for a bit. Thanks!
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index fc4c6b3..d6132d9 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -299,7 +299,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_string(fdt, nodename, "device_type", "pci"); qemu_fdt_setprop_cell(fdt, nodename, "linux,pci-domain", 0); qemu_fdt_setprop_cells(fdt, nodename, "bus-range", 0, - memmap[VIRT_PCIE_ECAM].base / + memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1); qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0); qemu_fdt_setprop_cells(fdt, nodename, "reg", 0, memmap[VIRT_PCIE_ECAM].base,
The largest pci bus number should be calculated from ECAM size, instead of its base address. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- hw/riscv/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)