| Message ID | 20190502225336.206885-3-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/5] dt-bindings: drm/bridge/synopsys: dw-hdmi: Add "unwedge" for ddc bus | expand |
On Thu, May 02, 2019 at 03:53:34PM -0700, Douglas Anderson wrote: > Downstream Chrome OS kernels use the builtin DDC bus from dw_hdmi on > veyron. This is the only way to get them to negotiate HDCP. > > Although HDCP isn't currently all supported upstream, it still seems > like it makes sense to use dw_hdmi's builtin I2C. Maybe eventually we > can get HDCP negotiation working. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> > --- > > arch/arm/boot/dts/rk3288-veyron.dtsi | 11 ++--------- > 1 file changed, 2 insertions(+), 9 deletions(-) > > diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi > index 1252522392c7..e1bee663d2c5 100644 > --- a/arch/arm/boot/dts/rk3288-veyron.dtsi > +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi > @@ -163,7 +163,8 @@ > }; > > &hdmi { > - ddc-i2c-bus = <&i2c5>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hdmi_ddc>; > status = "okay"; > }; > > @@ -334,14 +335,6 @@ > i2c-scl-rising-time-ns = <300>; /* 225ns measured */ > }; > > -&i2c5 { > - status = "okay"; > - > - clock-frequency = <100000>; > - i2c-scl-falling-time-ns = <300>; > - i2c-scl-rising-time-ns = <1000>; > -}; > - > &io_domains { > status = "okay"; > > -- > 2.21.0.1020.gf2820cf01a-goog >
Am Freitag, 3. Mai 2019, 00:53:34 CEST schrieb Douglas Anderson: > Downstream Chrome OS kernels use the builtin DDC bus from dw_hdmi on > veyron. This is the only way to get them to negotiate HDCP. > > Although HDCP isn't currently all supported upstream, it still seems > like it makes sense to use dw_hdmi's builtin I2C. Maybe eventually we > can get HDCP negotiation working. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> applied patches 3 to 5 for 5.3 Thanks Heiko
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 1252522392c7..e1bee663d2c5 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -163,7 +163,8 @@ }; &hdmi { - ddc-i2c-bus = <&i2c5>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_ddc>; status = "okay"; }; @@ -334,14 +335,6 @@ i2c-scl-rising-time-ns = <300>; /* 225ns measured */ }; -&i2c5 { - status = "okay"; - - clock-frequency = <100000>; - i2c-scl-falling-time-ns = <300>; - i2c-scl-rising-time-ns = <1000>; -}; - &io_domains { status = "okay";
Downstream Chrome OS kernels use the builtin DDC bus from dw_hdmi on veyron. This is the only way to get them to negotiate HDCP. Although HDCP isn't currently all supported upstream, it still seems like it makes sense to use dw_hdmi's builtin I2C. Maybe eventually we can get HDCP negotiation working. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm/boot/dts/rk3288-veyron.dtsi | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-)