| Message ID | 20190607082901.6491-3-lee.jones@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/8] i2c: i2c-qcom-geni: Provide support for ACPI | expand |
On Fri, 7 Jun 2019 at 10:29, Lee Jones <lee.jones@linaro.org> wrote: > > When booting MSM based platforms with Device Tree or some ACPI > implementations, it is possible to provide a list of reserved pins > via the 'gpio-reserved-ranges' and 'gpios' properties respectively. > However some ACPI tables are not populated with this information, > thus it has to come from a knowledgable device driver instead. > > Here we provide the MSM common driver with additional support to > parse this informtion and correctly populate the widely used > 'valid_mask'. > > Signed-off-by: Lee Jones <lee.jones@linaro.org> I'm not sure if this is the correct approach. Presumably, on ACPI systems, all the pinctl stuff is already set up by the firmware, and so we shouldn't touch *any* pins unless they have been requested explicitly. Is there any way we can support this in the current framework? > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 18 ++++++++++++++++++ > drivers/pinctrl/qcom/pinctrl-msm.h | 1 + > 2 files changed, 19 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index ee8119879c4c..3ac740b36508 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -607,8 +607,23 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip) > int ret; > unsigned int len, i; > unsigned int max_gpios = pctrl->soc->ngpios; > + const int *reserved = pctrl->soc->reserved_gpios; > u16 *tmp; > > + /* Driver provided reserved list overrides DT and ACPI */ > + if (reserved) { > + bitmap_fill(chip->valid_mask, max_gpios); > + for (i = 0; reserved[i] >= 0; i++) { > + if (i >= max_gpios || reserved[i] >= max_gpios) { > + dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); > + return -EINVAL; > + } > + clear_bit(reserved[i], chip->valid_mask); > + } > + > + return 0; > + } > + > /* The number of GPIOs in the ACPI tables */ > len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, > 0); > @@ -964,6 +979,9 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) > > static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) > { > + if (pctrl->soc->reserved_gpios) > + return true; > + > return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; > } > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h > index c12048e54a6f..23b93ae92269 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.h > +++ b/drivers/pinctrl/qcom/pinctrl-msm.h > @@ -121,6 +121,7 @@ struct msm_pinctrl_soc_data { > bool pull_no_keeper; > const char *const *tiles; > unsigned int ntiles; > + const int *reserved_gpios; > }; > > extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops; > -- > 2.17.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Fri 07 Jun 04:10 PDT 2019, Ard Biesheuvel wrote: > On Fri, 7 Jun 2019 at 10:29, Lee Jones <lee.jones@linaro.org> wrote: > > > > When booting MSM based platforms with Device Tree or some ACPI > > implementations, it is possible to provide a list of reserved pins > > via the 'gpio-reserved-ranges' and 'gpios' properties respectively. > > However some ACPI tables are not populated with this information, > > thus it has to come from a knowledgable device driver instead. > > > > Here we provide the MSM common driver with additional support to > > parse this informtion and correctly populate the widely used > > 'valid_mask'. > > > > Signed-off-by: Lee Jones <lee.jones@linaro.org> > > I'm not sure if this is the correct approach. Presumably, on ACPI > systems, all the pinctl stuff is already set up by the firmware, and > so we shouldn't touch *any* pins unless they have been requested > explicitly. Is there any way we can support this in the current > framework? > The only reason why we do this (at least the initial reason) is because gpiolib will read the current state of all GPIOs during initialization. But due to the sensitive nature of the application using these pins Linux is prohibited from touching the associated GPIO/pinmux/pinconf registers - resulting in a security violation if we allow gpiolib to touch them. When it comes to pinmux/pinconf those are only poked explicitly and those seems to be described in PEP nodes, such as: Package (0x02) { "TLMMGPIO", Package (0x06) { 0x2C, One, Zero, One, Zero, Zero } }, So the pinctrl-sdm845/msm drivers gives us GPIOs, but for pinconf and pinmux there's a need for something very different from what we're used to. Regards, Bjorn > > --- > > drivers/pinctrl/qcom/pinctrl-msm.c | 18 ++++++++++++++++++ > > drivers/pinctrl/qcom/pinctrl-msm.h | 1 + > > 2 files changed, 19 insertions(+) > > > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > > index ee8119879c4c..3ac740b36508 100644 > > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > > @@ -607,8 +607,23 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip) > > int ret; > > unsigned int len, i; > > unsigned int max_gpios = pctrl->soc->ngpios; > > + const int *reserved = pctrl->soc->reserved_gpios; > > u16 *tmp; > > > > + /* Driver provided reserved list overrides DT and ACPI */ > > + if (reserved) { > > + bitmap_fill(chip->valid_mask, max_gpios); > > + for (i = 0; reserved[i] >= 0; i++) { > > + if (i >= max_gpios || reserved[i] >= max_gpios) { > > + dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); > > + return -EINVAL; > > + } > > + clear_bit(reserved[i], chip->valid_mask); > > + } > > + > > + return 0; > > + } > > + > > /* The number of GPIOs in the ACPI tables */ > > len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, > > 0); > > @@ -964,6 +979,9 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) > > > > static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) > > { > > + if (pctrl->soc->reserved_gpios) > > + return true; > > + > > return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; > > } > > > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h > > index c12048e54a6f..23b93ae92269 100644 > > --- a/drivers/pinctrl/qcom/pinctrl-msm.h > > +++ b/drivers/pinctrl/qcom/pinctrl-msm.h > > @@ -121,6 +121,7 @@ struct msm_pinctrl_soc_data { > > bool pull_no_keeper; > > const char *const *tiles; > > unsigned int ntiles; > > + const int *reserved_gpios; > > }; > > > > extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops; > > -- > > 2.17.1 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Fri, Jun 7, 2019 at 1:10 PM Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote: > On Fri, 7 Jun 2019 at 10:29, Lee Jones <lee.jones@linaro.org> wrote: > > > > When booting MSM based platforms with Device Tree or some ACPI > > implementations, it is possible to provide a list of reserved pins > > via the 'gpio-reserved-ranges' and 'gpios' properties respectively. > > However some ACPI tables are not populated with this information, > > thus it has to come from a knowledgable device driver instead. > > > > Here we provide the MSM common driver with additional support to > > parse this informtion and correctly populate the widely used > > 'valid_mask'. > > > > Signed-off-by: Lee Jones <lee.jones@linaro.org> > > I'm not sure if this is the correct approach. Presumably, on ACPI > systems, all the pinctl stuff is already set up by the firmware, and > so we shouldn't touch *any* pins unless they have been requested > explicitly. Is there any way we can support this in the current > framework? I don't suppose anything but the GPIO portions of the pinctrl driver is ever used under ACPI. I guess in an ideal ACPI world noone (like userspace) would ever use a GPIO because ACPI would have all GPIOs assigned a particular purpose, so accessing any of them would lead to a crash. But in practice it seems a lot of GPIOs are available and used for example by userspace hacks, so just blacklisting the ones that cannot be accessed by the GPIO subsystem seems like a viable compromise. Then we have the ACPI paradigm of pin control being controlled by ACPI: this is also great in theory, but it seems like the ACPI firmware has in cases forgot or omitted to implement some of it and people need to access it anyways. The people writing the default firmware cannot think out or test all usecases, so some will be left open-ended to non-firmware authoring users. This is why drivers/pinctrl/intel/* exists despite being for exclusively ACPI platforms. Being able to control pins also from the kernel has become a viable compromise. Yours, Linus Walleij
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index ee8119879c4c..3ac740b36508 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -607,8 +607,23 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip) int ret; unsigned int len, i; unsigned int max_gpios = pctrl->soc->ngpios; + const int *reserved = pctrl->soc->reserved_gpios; u16 *tmp; + /* Driver provided reserved list overrides DT and ACPI */ + if (reserved) { + bitmap_fill(chip->valid_mask, max_gpios); + for (i = 0; reserved[i] >= 0; i++) { + if (i >= max_gpios || reserved[i] >= max_gpios) { + dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); + return -EINVAL; + } + clear_bit(reserved[i], chip->valid_mask); + } + + return 0; + } + /* The number of GPIOs in the ACPI tables */ len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0); @@ -964,6 +979,9 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) { + if (pctrl->soc->reserved_gpios) + return true; + return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; } diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index c12048e54a6f..23b93ae92269 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -121,6 +121,7 @@ struct msm_pinctrl_soc_data { bool pull_no_keeper; const char *const *tiles; unsigned int ntiles; + const int *reserved_gpios; }; extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;
When booting MSM based platforms with Device Tree or some ACPI implementations, it is possible to provide a list of reserved pins via the 'gpio-reserved-ranges' and 'gpios' properties respectively. However some ACPI tables are not populated with this information, thus it has to come from a knowledgable device driver instead. Here we provide the MSM common driver with additional support to parse this informtion and correctly populate the widely used 'valid_mask'. Signed-off-by: Lee Jones <lee.jones@linaro.org> --- drivers/pinctrl/qcom/pinctrl-msm.c | 18 ++++++++++++++++++ drivers/pinctrl/qcom/pinctrl-msm.h | 1 + 2 files changed, 19 insertions(+)