| Message ID | 20190610164531.8303-2-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: g12a/g12b: add the Ethernet PHY GPIO IRQs | expand |
On 10/06/2019 18:45, Martin Blumenstingl wrote: > The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad. > Describe this in the device tree so the PHY framework doesn't have to > poll the PHY status. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > index 0d9ec45b8059..8c9535880007 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts > @@ -190,6 +190,10 @@ > reset-assert-us = <10000>; > reset-deassert-us = <10000>; > reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; > + > + interrupt-parent = <&gpio_intc>; > + /* MAC_INTR on GPIOZ_14 */ > + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; > }; > }; > > [ 13.505835] RTL8211F Gigabit Ethernet 0.0:00: attached PHY driver [RTL8211F Gigabit Ethernet] (mii_bus:phy_addr=0.0:00, irq=26) # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 ... 26: 3 0 0 0 0 0 meson-gpio-irqchip 26 Level 0.0:00 ... Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts index 0d9ec45b8059..8c9535880007 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts @@ -190,6 +190,10 @@ reset-assert-us = <10000>; reset-deassert-us = <10000>; reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; }; };
The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad. Describe this in the device tree so the PHY framework doesn't have to poll the PHY status. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++ 1 file changed, 4 insertions(+)