| Message ID | 20190610164531.8303-3-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: g12a/g12b: add the Ethernet PHY GPIO IRQs | expand |
On 10/06/2019 18:45, Martin Blumenstingl wrote: > X96 Max has the PHY reset and interrupt lines are identical to the > Odroid-N2: > - GPIOZ_14 is the interrupt on X96 Max > - GPIOZ_15 is the reset line on X96 Max > > Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to > poll for the PHY status. > > Suggested-by: Neil Armstrong <narmstrong@baylibre.com> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > index 24956edaf8e2..e3f3f37d3081 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts > @@ -180,6 +180,10 @@ > reset-assert-us = <10000>; > reset-deassert-us = <10000>; > reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; > + > + interrupt-parent = <&gpio_intc>; > + /* MAC_INTR on GPIOZ_14 */ > + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; > }; > }; > > [ 46.844307] RTL8211F Gigabit Ethernet 0.0:00: attached PHY driver [RTL8211F Gigabit Ethernet] (mii_bus:phy_addr=0.0:00, irq=28) # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... 28: 5 0 0 0 meson-gpio-irqchip 26 Level 0.0:00 ... Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts index 24956edaf8e2..e3f3f37d3081 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts @@ -180,6 +180,10 @@ reset-assert-us = <10000>; reset-deassert-us = <10000>; reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_14 */ + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; }; };
X96 Max has the PHY reset and interrupt lines are identical to the Odroid-N2: - GPIOZ_14 is the interrupt on X96 Max - GPIOZ_15 is the reset line on X96 Max Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to poll for the PHY status. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ++++ 1 file changed, 4 insertions(+)