Message ID | 20190624105224.23927-2-horms+renesas@verge.net.au (mailing list archive) |
---|---|
State | Mainlined |
Commit | 4193a39240fbeda2ee35232bd0a1deedd41d31aa |
Headers | show |
Series | arm64: dts: renesas: r8a7799[05]: Add cpg reset for DU | expand |
On Mon, Jun 24, 2019 at 12:52 PM Simon Horman <horms+renesas@verge.net.au> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Add CPG reset properties to DU node of E3 (r8a77990) SoC. > > According to Laurent Pinchart, R-Car Gen3 reset is handled at the group > level so specifying one reset entry per group is sufficient. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Mon, Jun 24, 2019 at 12:52 PM Simon Horman <horms+renesas@verge.net.au> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Add CPG reset properties to DU node of E3 (r8a77990) SoC. > > According to Laurent Pinchart, R-Car Gen3 reset is handled at the group > level so specifying one reset entry per group is sufficient. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Thanks, applied and queued for v5.4. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index b4318661f35e..84d1f58e73e7 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1766,6 +1766,8 @@ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; + resets = <&cpg 724>; + reset-names = "du.0"; vsps = <&vspd0 0 &vspd1 0>; status = "disabled";