diff mbox series

[5/7] drm/amd/display: Use proper enum conversion functions

Message ID 20190704055217.45860-6-natechancellor@gmail.com (mailing list archive)
State New, archived
Headers show
Series amdgpu clang warning fixes on next-20190703 | expand

Commit Message

Nathan Chancellor July 4, 2019, 5:52 a.m. UTC
clang warns:

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
warning: implicit conversion from enumeration type 'enum smu_clk_type'
to different enumeration type 'enum amd_pp_clock_type'
[-Wenum-conversion]
                                        dc_to_smu_clock_type(clk_type),
                                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
warning: implicit conversion from enumeration type 'enum
amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
[-Wenum-conversion]
                                        dc_to_pp_clock_type(clk_type),
                                        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

There are functions to properly convert between all of these types, use
them so there are no longer any warnings.

Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10")
Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)")
Link: https://github.com/ClangBuiltLinux/linux/issues/586
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Arnd Bergmann July 9, 2019, 6:51 p.m. UTC | #1
On Thu, Jul 4, 2019 at 7:52 AM Nathan Chancellor
<natechancellor@gmail.com> wrote:
>
> clang warns:
>
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
> warning: implicit conversion from enumeration type 'enum smu_clk_type'
> to different enumeration type 'enum amd_pp_clock_type'
> [-Wenum-conversion]
>                                         dc_to_smu_clock_type(clk_type),
>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
> warning: implicit conversion from enumeration type 'enum
> amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
> [-Wenum-conversion]
>                                         dc_to_pp_clock_type(clk_type),
>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> There are functions to properly convert between all of these types, use
> them so there are no longer any warnings.

I had a different solution for this one as well. The difference is that your
patch keeps the types and assumes that the functions do the right thing
(i.e. the warning was correct), while my version assumes that the code
works correctly, but the types are wrong (a false positive warning).

One of the two patches is correct, the other one is broken, but I have
no idea which one.

      Arnd

From 61316b80c852d103bb61e1ce9904002414600125 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 8 Jul 2019 17:44:05 +0200
Subject: [PATCH] drm/amd/powerplay: fix one more incorrect enum conversion

Similar to a previous patch, this one converts the type from a
function argument of a different enum type:

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
error: implicit conversion from enumeration type 'enum smu_clk_type'
to different enumeration type 'enum amd_pp_clock_type'
[-Werror,-Wenum-conversion]
                                          dc_to_smu_clock_type(clk_type),
                                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:868:77: note:
expanded from macro 'smu_get_clock_by_type'
        ((smu)->funcs->get_clock_by_type ?
(smu)->funcs->get_clock_by_type((smu), (type), (clocks)) : 0)
                                           ~
            ^~~~
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
error: implicit conversion from enumeration type 'enum
amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
[-Werror,-Wenum-conversion]

dc_to_pp_clock_type(clk_type),

^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:872:111:
note: expanded from macro 'smu_get_clock_by_type_with_latency'

Add another type cast.

Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by
type with latency for display (v2)")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index eac09bfe3be2..88e3f8456b1c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type(
                }
        } else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
                if (smu_get_clock_by_type(&adev->smu,
-                                         dc_to_smu_clock_type(clk_type),
+                                         (enum
amd_pp_clock_type)dc_to_smu_clock_type(clk_type),
                                          &pp_clks)) {
                        get_default_clock_levels(clk_type, dc_clks);
                        return true;
@@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
                        return false;
        } else if (adev->smu.ppt_funcs &&
adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
                if (smu_get_clock_by_type_with_latency(&adev->smu,
-
dc_to_pp_clock_type(clk_type),
+                                                      (enum
smu_clk_type)dc_to_pp_clock_type(clk_type),
                                                       &pp_clks))
                        return false;
        }
Nathan Chancellor July 9, 2019, 8:21 p.m. UTC | #2
On Tue, Jul 09, 2019 at 08:51:33PM +0200, Arnd Bergmann wrote:
> On Thu, Jul 4, 2019 at 7:52 AM Nathan Chancellor
> <natechancellor@gmail.com> wrote:
> >
> > clang warns:
> >
> > drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
> > warning: implicit conversion from enumeration type 'enum smu_clk_type'
> > to different enumeration type 'enum amd_pp_clock_type'
> > [-Wenum-conversion]
> >                                         dc_to_smu_clock_type(clk_type),
> >                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
> > warning: implicit conversion from enumeration type 'enum
> > amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
> > [-Wenum-conversion]
> >                                         dc_to_pp_clock_type(clk_type),
> >                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >
> > There are functions to properly convert between all of these types, use
> > them so there are no longer any warnings.
> 
> I had a different solution for this one as well. The difference is that your
> patch keeps the types and assumes that the functions do the right thing
> (i.e. the warning was correct), while my version assumes that the code
> works correctly, but the types are wrong (a false positive warning).
> 
> One of the two patches is correct, the other one is broken, but I have
> no idea which one.
> 
>       Arnd

Indeed. I would personally argue that if using the correct conversion
functions (which are here to specifically avoid this type of warning)
causes issues, this code should probably not be using enumerated types
at all since the entire point is to enforce semantic correctness, not
just be a special way to represent small integer values, especially in
the case where the CLK values are completely different numerical values
in various enumerated types. I think enumerated type casts are ugly and
defeat the purpose of them but that's obviously just my opinion :)

Hopefully we can get some clarity on this soon.

Cheers,
Nathan
Nathan Chancellor July 19, 2019, 3:16 a.m. UTC | #3
On Wed, Jul 03, 2019 at 10:52:16PM -0700, Nathan Chancellor wrote:
> clang warns:
> 
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
> warning: implicit conversion from enumeration type 'enum smu_clk_type'
> to different enumeration type 'enum amd_pp_clock_type'
> [-Wenum-conversion]
>                                         dc_to_smu_clock_type(clk_type),
>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
> warning: implicit conversion from enumeration type 'enum
> amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
> [-Wenum-conversion]
>                                         dc_to_pp_clock_type(clk_type),
>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> There are functions to properly convert between all of these types, use
> them so there are no longer any warnings.
> 
> Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10")
> Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)")
> Link: https://github.com/ClangBuiltLinux/linux/issues/586
> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> index eac09bfe3be2..0f76cfff9d9b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> @@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type(
>  		}
>  	} else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
>  		if (smu_get_clock_by_type(&adev->smu,
> -					  dc_to_smu_clock_type(clk_type),
> +					  dc_to_pp_clock_type(clk_type),
>  					  &pp_clks)) {
>  			get_default_clock_levels(clk_type, dc_clks);
>  			return true;
> @@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
>  			return false;
>  	} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
>  		if (smu_get_clock_by_type_with_latency(&adev->smu,
> -						       dc_to_pp_clock_type(clk_type),
> +						       dc_to_smu_clock_type(clk_type),
>  						       &pp_clks))
>  			return false;
>  	}
> -- 
> 2.22.0
> 

Gentle ping for review, this is the last remaining warning that I see
from amdgpu on next-20190718.

Cheers,
Nathan
Leo Li July 25, 2019, 4 p.m. UTC | #4
On 2019-07-18 11:16 p.m., Nathan Chancellor wrote:
> On Wed, Jul 03, 2019 at 10:52:16PM -0700, Nathan Chancellor wrote:
>> clang warns:
>>
>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
>> warning: implicit conversion from enumeration type 'enum smu_clk_type'
>> to different enumeration type 'enum amd_pp_clock_type'
>> [-Wenum-conversion]
>>                                         dc_to_smu_clock_type(clk_type),
>>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
>> warning: implicit conversion from enumeration type 'enum
>> amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
>> [-Wenum-conversion]
>>                                         dc_to_pp_clock_type(clk_type),
>>                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>
>> There are functions to properly convert between all of these types, use
>> them so there are no longer any warnings.
>>
>> Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10")
>> Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)")
>> Link: https://github.com/ClangBuiltLinux/linux/issues/586
>> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
>> ---
>>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>> index eac09bfe3be2..0f76cfff9d9b 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>> @@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type(
>>  		}
>>  	} else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
>>  		if (smu_get_clock_by_type(&adev->smu,
>> -					  dc_to_smu_clock_type(clk_type),
>> +					  dc_to_pp_clock_type(clk_type),

smu_funcs->get_clock_by_type doesn't seem to be hooked up anywhere,
so this looks to be the most correct.

Although it makes more sense to use smu_clk_types here rather than
amd_pp_clock_type - any reason why this isn't the case?

>>  					  &pp_clks)) {
>>  			get_default_clock_levels(clk_type, dc_clks);
>>  			return true;
>> @@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
>>  			return false;
>>  	} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
>>  		if (smu_get_clock_by_type_with_latency(&adev->smu,
>> -						       dc_to_pp_clock_type(clk_type),
>> +						       dc_to_smu_clock_type(clk_type),

This is slightly concerning. The functions are doing the right thing,
but amd_pp_clock_type doesn't map 1-1 to smu_clk_type... In any case,
this looks good to me.

Reviewed-by: Leo Li <sunpeng.li@amd.com>

>>  						       &pp_clks))
>>  			return false;
>>  	}
>> -- 
>> 2.22.0
>>
> 
> Gentle ping for review, this is the last remaining warning that I see
> from amdgpu on next-20190718.
> 
> Cheers,
> Nathan
>
Kazlauskas, Nicholas July 25, 2019, 4:14 p.m. UTC | #5
On 7/25/19 12:00 PM, Li, Sun peng (Leo) wrote:
> 
> 
> On 2019-07-18 11:16 p.m., Nathan Chancellor wrote:
>> On Wed, Jul 03, 2019 at 10:52:16PM -0700, Nathan Chancellor wrote:
>>> clang warns:
>>>
>>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
>>> warning: implicit conversion from enumeration type 'enum smu_clk_type'
>>> to different enumeration type 'enum amd_pp_clock_type'
>>> [-Wenum-conversion]
>>>                                          dc_to_smu_clock_type(clk_type),
>>>                                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
>>> warning: implicit conversion from enumeration type 'enum
>>> amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
>>> [-Wenum-conversion]
>>>                                          dc_to_pp_clock_type(clk_type),
>>>                                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>
>>> There are functions to properly convert between all of these types, use
>>> them so there are no longer any warnings.
>>>
>>> Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10")
>>> Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)")
>>> Link: https://github.com/ClangBuiltLinux/linux/issues/586
>>> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
>>> ---
>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>> index eac09bfe3be2..0f76cfff9d9b 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>> @@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type(
>>>   		}
>>>   	} else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
>>>   		if (smu_get_clock_by_type(&adev->smu,
>>> -					  dc_to_smu_clock_type(clk_type),
>>> +					  dc_to_pp_clock_type(clk_type),
> 
> smu_funcs->get_clock_by_type doesn't seem to be hooked up anywhere,
> so this looks to be the most correct.
> 
> Although it makes more sense to use smu_clk_types here rather than
> amd_pp_clock_type - any reason why this isn't the case?
> 
>>>   					  &pp_clks)) {
>>>   			get_default_clock_levels(clk_type, dc_clks);
>>>   			return true;
>>> @@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
>>>   			return false;
>>>   	} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
>>>   		if (smu_get_clock_by_type_with_latency(&adev->smu,
>>> -						       dc_to_pp_clock_type(clk_type),
>>> +						       dc_to_smu_clock_type(clk_type),
> 
> This is slightly concerning. The functions are doing the right thing,
> but amd_pp_clock_type doesn't map 1-1 to smu_clk_type... In any case,
> this looks good to me.
> 
> Reviewed-by: Leo Li <sunpeng.li@amd.com>

Looks mostly like the table just needs to be sized properly:

	static int dc_clk_type_map[] = {
->
	static int dc_clk_type_map[DM_PP_CLOCK_TYPE_NUM_TYPES] = {

where DM_PP_CLOCK_TYPE_NUM_TYPES would be added to enum dm_pp_clock_type.

Or it could just use a switch table instead, like the other function does.

Nicholas Kazlauskas


> 
>>>   						       &pp_clks))
>>>   			return false;
>>>   	}
>>> -- 
>>> 2.22.0
>>>
>>
>> Gentle ping for review, this is the last remaining warning that I see
>> from amdgpu on next-20190718.
>>
>> Cheers,
>> Nathan
>>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
Leo Li July 25, 2019, 5:26 p.m. UTC | #6
On 2019-07-25 12:14 p.m., Kazlauskas, Nicholas wrote:
> On 7/25/19 12:00 PM, Li, Sun peng (Leo) wrote:
>>
>>
>> On 2019-07-18 11:16 p.m., Nathan Chancellor wrote:
>>> On Wed, Jul 03, 2019 at 10:52:16PM -0700, Nathan Chancellor wrote:
>>>> clang warns:
>>>>
>>>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8:
>>>> warning: implicit conversion from enumeration type 'enum smu_clk_type'
>>>> to different enumeration type 'enum amd_pp_clock_type'
>>>> [-Wenum-conversion]
>>>>                                          dc_to_smu_clock_type(clk_type),
>>>>                                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14:
>>>> warning: implicit conversion from enumeration type 'enum
>>>> amd_pp_clock_type' to different enumeration type 'enum smu_clk_type'
>>>> [-Wenum-conversion]
>>>>                                          dc_to_pp_clock_type(clk_type),
>>>>                                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>
>>>> There are functions to properly convert between all of these types, use
>>>> them so there are no longer any warnings.
>>>>
>>>> Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10")
>>>> Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)")
>>>> Link: https://github.com/ClangBuiltLinux/linux/issues/586
>>>> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
>>>> ---
>>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
>>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>>> index eac09bfe3be2..0f76cfff9d9b 100644
>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
>>>> @@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type(
>>>>   		}
>>>>   	} else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
>>>>   		if (smu_get_clock_by_type(&adev->smu,
>>>> -					  dc_to_smu_clock_type(clk_type),
>>>> +					  dc_to_pp_clock_type(clk_type),
>>
>> smu_funcs->get_clock_by_type doesn't seem to be hooked up anywhere,
>> so this looks to be the most correct.
>>
>> Although it makes more sense to use smu_clk_types here rather than
>> amd_pp_clock_type - any reason why this isn't the case?
>>
>>>>   					  &pp_clks)) {
>>>>   			get_default_clock_levels(clk_type, dc_clks);
>>>>   			return true;
>>>> @@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
>>>>   			return false;
>>>>   	} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
>>>>   		if (smu_get_clock_by_type_with_latency(&adev->smu,
>>>> -						       dc_to_pp_clock_type(clk_type),
>>>> +						       dc_to_smu_clock_type(clk_type),
>>
>> This is slightly concerning. The functions are doing the right thing,
>> but amd_pp_clock_type doesn't map 1-1 to smu_clk_type... In any case,
>> this looks good to me.
>>
>> Reviewed-by: Leo Li <sunpeng.li@amd.com>
> 
> Looks mostly like the table just needs to be sized properly:
> 
> 	static int dc_clk_type_map[] = {
> ->
> 	static int dc_clk_type_map[DM_PP_CLOCK_TYPE_NUM_TYPES] = {
> 
> where DM_PP_CLOCK_TYPE_NUM_TYPES would be added to enum dm_pp_clock_type.
> 
> Or it could just use a switch table instead, like the other function does.
> 
> Nicholas Kazlauskas

Good catch, I'll spin up something quick.

Leo

> 
> 
>>
>>>>   						       &pp_clks))
>>>>   			return false;
>>>>   	}
>>>> -- 
>>>> 2.22.0
>>>>
>>>
>>> Gentle ping for review, this is the last remaining warning that I see
>>> from amdgpu on next-20190718.
>>>
>>> Cheers,
>>> Nathan
>>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>>
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index eac09bfe3be2..0f76cfff9d9b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -333,7 +333,7 @@  bool dm_pp_get_clock_levels_by_type(
 		}
 	} else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) {
 		if (smu_get_clock_by_type(&adev->smu,
-					  dc_to_smu_clock_type(clk_type),
+					  dc_to_pp_clock_type(clk_type),
 					  &pp_clks)) {
 			get_default_clock_levels(clk_type, dc_clks);
 			return true;
@@ -418,7 +418,7 @@  bool dm_pp_get_clock_levels_by_type_with_latency(
 			return false;
 	} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
 		if (smu_get_clock_by_type_with_latency(&adev->smu,
-						       dc_to_pp_clock_type(clk_type),
+						       dc_to_smu_clock_type(clk_type),
 						       &pp_clks))
 			return false;
 	}