diff mbox series

[RESEND] clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1

Message ID 20190625091002.27567-1-codrin.ciubotariu@microchip.com (mailing list archive)
State Mainlined
Commit 1573eebeaa8055777eb753f9b4d1cbe653380c38
Headers show
Series [RESEND] clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1 | expand

Commit Message

Codrin Ciubotariu June 25, 2019, 9:10 a.m. UTC
In clk_generated_determine_rate(), if the divisor is greater than
GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
If clk_generated_set_rate() will be called later with this wrong
rate, it will return -EINVAL, so the generated clock won't change
its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.

Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor loop")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
---

- The email-server was converting my patches to base64, so I resend it
  using another server;
- Added acked-bys from Nicolas and Ludovic;

 drivers/clk/at91/clk-generated.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Nicolas Ferre July 3, 2019, 3:05 p.m. UTC | #1
On 25/06/2019 at 11:10, Codrin Ciubotariu wrote:
> In clk_generated_determine_rate(), if the divisor is greater than
> GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> If clk_generated_set_rate() will be called later with this wrong
> rate, it will return -EINVAL, so the generated clock won't change
> its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.
> 
> Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor loop")
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> ---
> 
> - The email-server was converting my patches to base64, so I resend it
>    using another server;
> - Added acked-bys from Nicolas and Ludovic;

Stephen,

I don't see this patch in linux-next and we're already late in the 
development cycle: aka ping...

Best regards,
   Nicolas

> 
>   drivers/clk/at91/clk-generated.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
> index 5f18847965c1..290cffe35deb 100644
> --- a/drivers/clk/at91/clk-generated.c
> +++ b/drivers/clk/at91/clk-generated.c
> @@ -146,6 +146,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw,
>   			continue;
>   
>   		div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
> +		if (div > GENERATED_MAX_DIV + 1)
> +			div = GENERATED_MAX_DIV + 1;
>   
>   		clk_generated_best_diff(req, parent, parent_rate, div,
>   					&best_diff, &best_rate);
>
Stephen Boyd July 22, 2019, 9:31 p.m. UTC | #2
Quoting Nicolas.Ferre@microchip.com (2019-07-03 08:05:24)
> On 25/06/2019 at 11:10, Codrin Ciubotariu wrote:
> > In clk_generated_determine_rate(), if the divisor is greater than
> > GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> > If clk_generated_set_rate() will be called later with this wrong
> > rate, it will return -EINVAL, so the generated clock won't change
> > its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.
> > 
> > Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor loop")
> > Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> > Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> > Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> > ---
> > 
> > - The email-server was converting my patches to base64, so I resend it
> >    using another server;
> > - Added acked-bys from Nicolas and Ludovic;
> 
> Stephen,
> 
> I don't see this patch in linux-next and we're already late in the 
> development cycle: aka ping...
> 

Sorry. I dropped this one. Will pick it up into fixes.
Stephen Boyd July 22, 2019, 9:32 p.m. UTC | #3
Quoting Codrin Ciubotariu (2019-06-25 02:10:02)
> In clk_generated_determine_rate(), if the divisor is greater than
> GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> If clk_generated_set_rate() will be called later with this wrong
> rate, it will return -EINVAL, so the generated clock won't change
> its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.
> 
> Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor loop")
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> ---

Applied to clk-fixes
diff mbox series

Patch

diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index 5f18847965c1..290cffe35deb 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -146,6 +146,8 @@  static int clk_generated_determine_rate(struct clk_hw *hw,
 			continue;
 
 		div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
+		if (div > GENERATED_MAX_DIV + 1)
+			div = GENERATED_MAX_DIV + 1;
 
 		clk_generated_best_diff(req, parent, parent_rate, div,
 					&best_diff, &best_rate);