diff mbox series

[v2,2/4] drm/i915/uc: Consider enable_guc modparam during fw selection

Message ID 20190731143856.35460-3-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show
Series Don't sanitize enable_guc | expand

Commit Message

Michal Wajdeczko July 31, 2019, 2:38 p.m. UTC 
We can use value of enable_guc modparam during firmware path selection
and start using firmware status to see if GuC/HuC is being used.
This is first step to make enable_guc modparam read-only.

v2: rebased, don't care about <0 (Chris)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> #v1
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h   |  5 +++++
 drivers/gpu/drm/i915/gt/uc/intel_huc.h   |  5 +++++
 drivers/gpu/drm/i915/gt/uc/intel_uc.h    |  6 ++----
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 23 +++++++++++++++++++++--
 4 files changed, 33 insertions(+), 6 deletions(-)

Comments

Chris Wilson July 31, 2019, 5:47 p.m. UTC | #1 
Quoting Michal Wajdeczko (2019-07-31 15:38:54)
> +static const char *__override_guc_firmware_path(void)
> +{
> +       if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION ||
> +                                        ENABLE_GUC_LOAD_HUC))

 || ?
-Chris
Michal Wajdeczko July 31, 2019, 5:50 p.m. UTC | #2 
On Wed, 31 Jul 2019 19:47:27 +0200, Chris Wilson  
<chris@chris-wilson.co.uk> wrote:

> Quoting Michal Wajdeczko (2019-07-31 15:38:54)
>> +static const char *__override_guc_firmware_path(void)
>> +{
>> +       if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION ||
>> +                                        ENABLE_GUC_LOAD_HUC))
>
>  || ?

oops, thanks for catching this (last minute addition, hrrr)
Chris Wilson July 31, 2019, 8:50 p.m. UTC | #3 
Quoting Michal Wajdeczko (2019-07-31 18:50:23)
> On Wed, 31 Jul 2019 19:47:27 +0200, Chris Wilson  
> <chris@chris-wilson.co.uk> wrote:
> 
> > Quoting Michal Wajdeczko (2019-07-31 15:38:54)
> >> +static const char *__override_guc_firmware_path(void)
> >> +{
> >> +       if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION ||
> >> +                                        ENABLE_GUC_LOAD_HUC))
> >
> >  || ?
> 
> oops, thanks for catching this (last minute addition, hrrr)

With that,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 714e9892aaff..5901506672cd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -172,6 +172,11 @@  int intel_guc_suspend(struct intel_guc *guc);
 int intel_guc_resume(struct intel_guc *guc);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
 
+static inline bool intel_guc_is_supported(struct intel_guc *guc)
+{
+	return intel_uc_fw_supported(&guc->fw);
+}
+
 static inline bool intel_guc_is_running(struct intel_guc *guc)
 {
 	return intel_uc_fw_is_running(&guc->fw);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
index 4465209ce233..a6ae59b8cb77 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
@@ -55,6 +55,11 @@  static inline int intel_huc_sanitize(struct intel_huc *huc)
 	return 0;
 }
 
+static inline bool intel_huc_is_supported(struct intel_huc *huc)
+{
+	return intel_uc_fw_supported(&huc->fw);
+}
+
 static inline bool intel_huc_is_authenticated(struct intel_huc *huc)
 {
 	return intel_uc_fw_is_running(&huc->fw);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
index 66d8b1ee6f1d..cf6c60cffdfb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
@@ -51,8 +51,7 @@  int intel_uc_runtime_resume(struct intel_uc *uc);
 
 static inline bool intel_uc_supports_guc(struct intel_uc *uc)
 {
-	GEM_BUG_ON(i915_modparams.enable_guc < 0);
-	return i915_modparams.enable_guc > 0;
+	return intel_guc_is_supported(&uc->guc);
 }
 
 static inline bool intel_uc_supports_guc_submission(struct intel_uc *uc)
@@ -63,8 +62,7 @@  static inline bool intel_uc_supports_guc_submission(struct intel_uc *uc)
 
 static inline bool intel_uc_supports_huc(struct intel_uc *uc)
 {
-	GEM_BUG_ON(i915_modparams.enable_guc < 0);
-	return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC;
+	return intel_huc_is_supported(&uc->huc);
 }
 
 #endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index ac91e3efd02b..3bf5ca35a005 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -132,6 +132,25 @@  __uc_fw_auto_select(struct intel_uc_fw *uc_fw, enum intel_platform p, u8 rev)
 			uc_fw->path = NULL;
 		}
 	}
+
+	/* We don't want to enable GuC/HuC on pre-Gen11 by default */
+	if (i915_modparams.enable_guc == -1 && p < INTEL_ICELAKE)
+		uc_fw->path = NULL;
+}
+
+static const char *__override_guc_firmware_path(void)
+{
+	if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION ||
+					 ENABLE_GUC_LOAD_HUC))
+		return i915_modparams.guc_firmware_path;
+	return "";
+}
+
+static const char *__override_huc_firmware_path(void)
+{
+	if (i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC)
+		return i915_modparams.huc_firmware_path;
+	return "";
 }
 
 static bool
@@ -139,10 +158,10 @@  __uc_fw_override(struct intel_uc_fw *uc_fw)
 {
 	switch (uc_fw->type) {
 	case INTEL_UC_FW_TYPE_GUC:
-		uc_fw->path = i915_modparams.guc_firmware_path;
+		uc_fw->path = __override_guc_firmware_path();
 		break;
 	case INTEL_UC_FW_TYPE_HUC:
-		uc_fw->path = i915_modparams.huc_firmware_path;
+		uc_fw->path = __override_huc_firmware_path();
 		break;
 	}