| Message ID | 1566542425-20082-2-git-send-email-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | b2fcb285ade36c2339ee6638223a65829ee9907f |
| Headers | show |
| Series | [RESEND,v2,1/2] dt-bindings: usb: mtk-xhci: add an optional xhci_ck clock | expand |
On 23/08/2019 08:40, Chunfeng Yun wrote: > Some SoCs may have an optional clock xhci_ck (125M or 200M), it > usually uses the same PLL as sys_ck, so support it. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > v2 no changes > --- > drivers/usb/host/xhci-mtk.c | 13 +++++++++++++ > drivers/usb/host/xhci-mtk.h | 1 + > 2 files changed, 14 insertions(+) > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c > index 026fe18972d3..b18a6baef204 100644 > --- a/drivers/usb/host/xhci-mtk.c > +++ b/drivers/usb/host/xhci-mtk.c > @@ -216,6 +216,10 @@ static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk) > return PTR_ERR(mtk->sys_clk); > } > > + mtk->xhci_clk = devm_clk_get_optional(dev, "xhci_ck"); > + if (IS_ERR(mtk->xhci_clk)) > + return PTR_ERR(mtk->xhci_clk); > + > mtk->ref_clk = devm_clk_get_optional(dev, "ref_ck"); > if (IS_ERR(mtk->ref_clk)) > return PTR_ERR(mtk->ref_clk); > @@ -244,6 +248,12 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk) > goto sys_clk_err; > } > > + ret = clk_prepare_enable(mtk->xhci_clk); > + if (ret) { > + dev_err(mtk->dev, "failed to enable xhci_clk\n"); > + goto xhci_clk_err; > + } > + > ret = clk_prepare_enable(mtk->mcu_clk); > if (ret) { > dev_err(mtk->dev, "failed to enable mcu_clk\n"); > @@ -261,6 +271,8 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk) > dma_clk_err: > clk_disable_unprepare(mtk->mcu_clk); > mcu_clk_err: > + clk_disable_unprepare(mtk->xhci_clk); > +xhci_clk_err: > clk_disable_unprepare(mtk->sys_clk); > sys_clk_err: > clk_disable_unprepare(mtk->ref_clk); > @@ -272,6 +284,7 @@ static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk) > { > clk_disable_unprepare(mtk->dma_clk); > clk_disable_unprepare(mtk->mcu_clk); > + clk_disable_unprepare(mtk->xhci_clk); > clk_disable_unprepare(mtk->sys_clk); > clk_disable_unprepare(mtk->ref_clk); > } > diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h > index 8be8c5f7ff62..5ac458b7d2e0 100644 > --- a/drivers/usb/host/xhci-mtk.h > +++ b/drivers/usb/host/xhci-mtk.h > @@ -139,6 +139,7 @@ struct xhci_hcd_mtk { > struct regulator *vusb33; > struct regulator *vbus; > struct clk *sys_clk; /* sys and mac clock */ > + struct clk *xhci_clk; > struct clk *ref_clk; > struct clk *mcu_clk; > struct clk *dma_clk; >
On 23.8.2019 9.40, Chunfeng Yun wrote: > Some SoCs may have an optional clock xhci_ck (125M or 200M), it > usually uses the same PLL as sys_ck, so support it. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 026fe18972d3..b18a6baef204 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -216,6 +216,10 @@ static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk) return PTR_ERR(mtk->sys_clk); } + mtk->xhci_clk = devm_clk_get_optional(dev, "xhci_ck"); + if (IS_ERR(mtk->xhci_clk)) + return PTR_ERR(mtk->xhci_clk); + mtk->ref_clk = devm_clk_get_optional(dev, "ref_ck"); if (IS_ERR(mtk->ref_clk)) return PTR_ERR(mtk->ref_clk); @@ -244,6 +248,12 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk) goto sys_clk_err; } + ret = clk_prepare_enable(mtk->xhci_clk); + if (ret) { + dev_err(mtk->dev, "failed to enable xhci_clk\n"); + goto xhci_clk_err; + } + ret = clk_prepare_enable(mtk->mcu_clk); if (ret) { dev_err(mtk->dev, "failed to enable mcu_clk\n"); @@ -261,6 +271,8 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk) dma_clk_err: clk_disable_unprepare(mtk->mcu_clk); mcu_clk_err: + clk_disable_unprepare(mtk->xhci_clk); +xhci_clk_err: clk_disable_unprepare(mtk->sys_clk); sys_clk_err: clk_disable_unprepare(mtk->ref_clk); @@ -272,6 +284,7 @@ static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk) { clk_disable_unprepare(mtk->dma_clk); clk_disable_unprepare(mtk->mcu_clk); + clk_disable_unprepare(mtk->xhci_clk); clk_disable_unprepare(mtk->sys_clk); clk_disable_unprepare(mtk->ref_clk); } diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h index 8be8c5f7ff62..5ac458b7d2e0 100644 --- a/drivers/usb/host/xhci-mtk.h +++ b/drivers/usb/host/xhci-mtk.h @@ -139,6 +139,7 @@ struct xhci_hcd_mtk { struct regulator *vusb33; struct regulator *vbus; struct clk *sys_clk; /* sys and mac clock */ + struct clk *xhci_clk; struct clk *ref_clk; struct clk *mcu_clk; struct clk *dma_clk;
Some SoCs may have an optional clock xhci_ck (125M or 200M), it usually uses the same PLL as sys_ck, so support it. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- v2 no changes --- drivers/usb/host/xhci-mtk.c | 13 +++++++++++++ drivers/usb/host/xhci-mtk.h | 1 + 2 files changed, 14 insertions(+)