| Message ID | 20190902031716.43195-11-xiaowei.bao@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | *** SUBJECT HERE *** | expand |
On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote: > Add PCIe EP node for ls1088a to support EP mode. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > --- > v2: > - Remove the pf-offset proparty. > v3: > - No change. > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 ++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > index c676d07..da246ab 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > @@ -483,6 +483,17 @@ > status = "disabled"; > }; > > + pcie_ep@3400000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series. Besides that, this looks OK. Thanks, Andrew Murray > + reg = <0x00 0x03400000 0x0 0x00100000 > + 0x20 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <24>; > + num-ob-windows = <128>; > + max-functions = /bits/ 8 <2>; > + status = "disabled"; > + }; > + > pcie@3500000 { > compatible = "fsl,ls1088a-pcie"; > reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ > @@ -508,6 +519,16 @@ > status = "disabled"; > }; > > + pcie_ep@3500000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > + reg = <0x00 0x03500000 0x0 0x00100000 > + 0x28 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <6>; > + num-ob-windows = <8>; > + status = "disabled"; > + }; > + > pcie@3600000 { > compatible = "fsl,ls1088a-pcie"; > reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ > @@ -533,6 +554,16 @@ > status = "disabled"; > }; > > + pcie_ep@3600000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > + reg = <0x00 0x03600000 0x0 0x00100000 > + 0x30 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <6>; > + num-ob-windows = <8>; > + status = "disabled"; > + }; > + > smmu: iommu@5000000 { > compatible = "arm,mmu-500"; > reg = <0 0x5000000 0 0x800000>; > -- > 2.9.5 >
> -----Original Message----- > From: Andrew Murray <andrew.murray@arm.com> > Sent: 2019年9月2日 21:06 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; M.h. > Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy > Zang <roy.zang@nxp.com>; jingoohan1@gmail.com; > gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org; > arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou > <zhiqiang.hou@nxp.com> > Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for > ls1088a > > On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote: > > Add PCIe EP node for ls1088a to support EP mode. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > --- > > v2: > > - Remove the pf-offset proparty. > > v3: > > - No change. > > > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 > ++++++++++++++++++++++++++ > > 1 file changed, 31 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > index c676d07..da246ab 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > @@ -483,6 +483,17 @@ > > status = "disabled"; > > }; > > > > + pcie_ep@3400000 { > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series. > > Besides that, this looks OK. As explained, the "fsl,ls-pcie-ep" is needed, due to the u-boot will fixup the status property base on this compatible, I think we reserve this compatible is helpfully, if delate this compatible, I have to modify the code of bootloader. Thanks XIaowei > > Thanks, > > Andrew Murray > > > + reg = <0x00 0x03400000 0x0 0x00100000 > > + 0x20 0x00000000 0x8 0x00000000>; > > + reg-names = "regs", "addr_space"; > > + num-ib-windows = <24>; > > + num-ob-windows = <128>; > > + max-functions = /bits/ 8 <2>; > > + status = "disabled"; > > + }; > > + > > pcie@3500000 { > > compatible = "fsl,ls1088a-pcie"; > > reg = <0x00 0x03500000 0x0 0x00100000 /* controller > registers */ > > @@ -508,6 +519,16 @@ > > status = "disabled"; > > }; > > > > + pcie_ep@3500000 { > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > + reg = <0x00 0x03500000 0x0 0x00100000 > > + 0x28 0x00000000 0x8 0x00000000>; > > + reg-names = "regs", "addr_space"; > > + num-ib-windows = <6>; > > + num-ob-windows = <8>; > > + status = "disabled"; > > + }; > > + > > pcie@3600000 { > > compatible = "fsl,ls1088a-pcie"; > > reg = <0x00 0x03600000 0x0 0x00100000 /* controller > registers */ > > @@ -533,6 +554,16 @@ > > status = "disabled"; > > }; > > > > + pcie_ep@3600000 { > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > + reg = <0x00 0x03600000 0x0 0x00100000 > > + 0x30 0x00000000 0x8 0x00000000>; > > + reg-names = "regs", "addr_space"; > > + num-ib-windows = <6>; > > + num-ob-windows = <8>; > > + status = "disabled"; > > + }; > > + > > smmu: iommu@5000000 { > > compatible = "arm,mmu-500"; > > reg = <0 0x5000000 0 0x800000>; > > -- > > 2.9.5 > >
On Tue, Sep 03, 2019 at 02:01:32AM +0000, Xiaowei Bao wrote: > > > > -----Original Message----- > > From: Andrew Murray <andrew.murray@arm.com> > > Sent: 2019年9月2日 21:06 > > To: Xiaowei Bao <xiaowei.bao@nxp.com> > > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; M.h. > > Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy > > Zang <roy.zang@nxp.com>; jingoohan1@gmail.com; > > gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org; > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > > linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org; > > arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou > > <zhiqiang.hou@nxp.com> > > Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for > > ls1088a > > > > On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote: > > > Add PCIe EP node for ls1088a to support EP mode. > > > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > > --- > > > v2: > > > - Remove the pf-offset proparty. > > > v3: > > > - No change. > > > > > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 > > ++++++++++++++++++++++++++ > > > 1 file changed, 31 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > index c676d07..da246ab 100644 > > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > @@ -483,6 +483,17 @@ > > > status = "disabled"; > > > }; > > > > > > + pcie_ep@3400000 { > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > > Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series. > > > > Besides that, this looks OK. > > As explained, the "fsl,ls-pcie-ep" is needed, due to the u-boot will fixup the status > property base on this compatible, I think we reserve this compatible is helpfully, > if delate this compatible, I have to modify the code of bootloader. I assume you mean that u-boot fixes up "fsl,ls-pcie-ep" *only* for ls1046a devices? Thanks, Andrew Murray > > Thanks > XIaowei > > > > > Thanks, > > > > Andrew Murray > > > > > + reg = <0x00 0x03400000 0x0 0x00100000 > > > + 0x20 0x00000000 0x8 0x00000000>; > > > + reg-names = "regs", "addr_space"; > > > + num-ib-windows = <24>; > > > + num-ob-windows = <128>; > > > + max-functions = /bits/ 8 <2>; > > > + status = "disabled"; > > > + }; > > > + > > > pcie@3500000 { > > > compatible = "fsl,ls1088a-pcie"; > > > reg = <0x00 0x03500000 0x0 0x00100000 /* controller > > registers */ > > > @@ -508,6 +519,16 @@ > > > status = "disabled"; > > > }; > > > > > > + pcie_ep@3500000 { > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > + reg = <0x00 0x03500000 0x0 0x00100000 > > > + 0x28 0x00000000 0x8 0x00000000>; > > > + reg-names = "regs", "addr_space"; > > > + num-ib-windows = <6>; > > > + num-ob-windows = <8>; > > > + status = "disabled"; > > > + }; > > > + > > > pcie@3600000 { > > > compatible = "fsl,ls1088a-pcie"; > > > reg = <0x00 0x03600000 0x0 0x00100000 /* controller > > registers */ > > > @@ -533,6 +554,16 @@ > > > status = "disabled"; > > > }; > > > > > > + pcie_ep@3600000 { > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > + reg = <0x00 0x03600000 0x0 0x00100000 > > > + 0x30 0x00000000 0x8 0x00000000>; > > > + reg-names = "regs", "addr_space"; > > > + num-ib-windows = <6>; > > > + num-ob-windows = <8>; > > > + status = "disabled"; > > > + }; > > > + > > > smmu: iommu@5000000 { > > > compatible = "arm,mmu-500"; > > > reg = <0 0x5000000 0 0x800000>; > > > -- > > > 2.9.5 > > >
> -----Original Message----- > From: Andrew Murray <andrew.murray@arm.com> > Sent: 2019年9月12日 21:02 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; M.h. > Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy > Zang <roy.zang@nxp.com>; jingoohan1@gmail.com; > gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org; > arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou > <zhiqiang.hou@nxp.com> > Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for > ls1088a > > On Tue, Sep 03, 2019 at 02:01:32AM +0000, Xiaowei Bao wrote: > > > > > > > -----Original Message----- > > > From: Andrew Murray <andrew.murray@arm.com> > > > Sent: 2019年9月2日 21:06 > > > To: Xiaowei Bao <xiaowei.bao@nxp.com> > > > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; > > > Leo Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; > M.h. > > > Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy > > > Zang <roy.zang@nxp.com>; jingoohan1@gmail.com; > > > gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org; > > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > > > linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org; > > > arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou > > > <zhiqiang.hou@nxp.com> > > > Subject: Re: [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP > > > node for ls1088a > > > > > > On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote: > > > > Add PCIe EP node for ls1088a to support EP mode. > > > > > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > > > --- > > > > v2: > > > > - Remove the pf-offset proparty. > > > > v3: > > > > - No change. > > > > > > > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 > > > ++++++++++++++++++++++++++ > > > > 1 file changed, 31 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > > index c676d07..da246ab 100644 > > > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > > > @@ -483,6 +483,17 @@ > > > > status = "disabled"; > > > > }; > > > > > > > > + pcie_ep@3400000 { > > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > > > > Here you specify a fallback "fsl,ls-pcie-ep" that is removed by this series. > > > > > > Besides that, this looks OK. > > > > As explained, the "fsl,ls-pcie-ep" is needed, due to the u-boot will > > fixup the status property base on this compatible, I think we reserve > > this compatible is helpfully, if delate this compatible, I have to modify the > code of bootloader. > > I assume you mean that u-boot fixes up "fsl,ls-pcie-ep" *only* for ls1046a > devices? No, all Layerscape platform of NXP. > > Thanks, > > Andrew Murray > > > > > Thanks > > XIaowei > > > > > > > > Thanks, > > > > > > Andrew Murray > > > > > > > + reg = <0x00 0x03400000 0x0 0x00100000 > > > > + 0x20 0x00000000 0x8 0x00000000>; > > > > + reg-names = "regs", "addr_space"; > > > > + num-ib-windows = <24>; > > > > + num-ob-windows = <128>; > > > > + max-functions = /bits/ 8 <2>; > > > > + status = "disabled"; > > > > + }; > > > > + > > > > pcie@3500000 { > > > > compatible = "fsl,ls1088a-pcie"; > > > > reg = <0x00 0x03500000 0x0 0x00100000 /* controller > > > registers */ > > > > @@ -508,6 +519,16 @@ > > > > status = "disabled"; > > > > }; > > > > > > > > + pcie_ep@3500000 { > > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > > + reg = <0x00 0x03500000 0x0 0x00100000 > > > > + 0x28 0x00000000 0x8 0x00000000>; > > > > + reg-names = "regs", "addr_space"; > > > > + num-ib-windows = <6>; > > > > + num-ob-windows = <8>; > > > > + status = "disabled"; > > > > + }; > > > > + > > > > pcie@3600000 { > > > > compatible = "fsl,ls1088a-pcie"; > > > > reg = <0x00 0x03600000 0x0 0x00100000 /* controller > > > registers */ > > > > @@ -533,6 +554,16 @@ > > > > status = "disabled"; > > > > }; > > > > > > > > + pcie_ep@3600000 { > > > > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > > > > + reg = <0x00 0x03600000 0x0 0x00100000 > > > > + 0x30 0x00000000 0x8 0x00000000>; > > > > + reg-names = "regs", "addr_space"; > > > > + num-ib-windows = <6>; > > > > + num-ob-windows = <8>; > > > > + status = "disabled"; > > > > + }; > > > > + > > > > smmu: iommu@5000000 { > > > > compatible = "arm,mmu-500"; > > > > reg = <0 0x5000000 0 0x800000>; > > > > -- > > > > 2.9.5 > > > >
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index c676d07..da246ab 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -483,6 +483,17 @@ status = "disabled"; }; + pcie_ep@3400000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x20 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <24>; + num-ob-windows = <128>; + max-functions = /bits/ 8 <2>; + status = "disabled"; + }; + pcie@3500000 { compatible = "fsl,ls1088a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ @@ -508,6 +519,16 @@ status = "disabled"; }; + pcie_ep@3500000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x28 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + pcie@3600000 { compatible = "fsl,ls1088a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ @@ -533,6 +554,16 @@ status = "disabled"; }; + pcie_ep@3600000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x30 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + smmu: iommu@5000000 { compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>;
Add PCIe EP node for ls1088a to support EP mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - Remove the pf-offset proparty. v3: - No change. arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)