| Message ID | 20190905215650.f8b5d22b625ddcff7d093883@knights.ucf.edu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add PCI device IDs for family 17h, model 70h | expand |
On Fri, Sep 06, 2019 at 01:56:56AM +0000, Isaac Vaughn wrote: > Add the new Family 17h Model 70h PCI IDs (device 18h functions 0,3,4,6) > to the kernel, the hwmon module, and the AMD64 EDAC module. > > Signed-off-by: Isaac Vaughn <isaac.vaughn@knights.ucf.edu> > --- > arch/x86/kernel/amd_nb.c | 3 +++ > drivers/edac/amd64_edac.c | 13 +++++++++++++ > drivers/edac/amd64_edac.h | 3 +++ > drivers/hwmon/k10temp.c | 1 + > include/linux/pci_ids.h | 1 + > 5 files changed, 21 insertions(+) Ok, next lessons :) Before you send a patch, do: $ git diff | ./scripts/get_maintainer.pl or if you've committed it already: $ git log -p -1 | ./scripts/get_maintainer.pl to know who to Cc. I've added the respective mailing lists to Cc because this is a trivial addition of PCI IDs and generally maintainers want to see it as an FYI thing, thus Ccing the mailing list only. But you can just as well Cc the maintainers too - they can manage the mail volume. :) And last but *definitely* not least, the most important lesson: *always* - I can't stress this enough - *always* build *and* test your patch before sending: drivers/edac/amd64_edac.c:2326:19: error: ‘f17_base_addr_to_cs_size’ undeclared here (not in a function); did you mean ‘f17_addr_mask_to_cs_size’? .dbam_to_cs = f17_base_addr_to_cs_size, ^~~~~~~~~~~~~~~~~~~~~~~~ f17_addr_mask_to_cs_size make[2]: *** [scripts/Makefile.build:273: drivers/edac/amd64_edac.o] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [scripts/Makefile.build:490: drivers/edac] Error 2 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1076: drivers] Error 2 make: *** Waiting for unfinished jobs.... If it is any consolation: we have all done this mistake in a hurry at least once in the past but pls do take your time. Thx. Leaving in the rest for reference for the newly CCed. > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > index d63e63b7d1d9..0a8b816857c1 100644 > --- a/arch/x86/kernel/amd_nb.c > +++ b/arch/x86/kernel/amd_nb.c > @@ -21,6 +21,7 @@ > #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494 > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444 > > /* Protect the PCI config register pairs used for SMN and DF indirect access. */ > static DEFINE_MUTEX(smn_mutex); > @@ -49,6 +50,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, > {} > }; > @@ -63,6 +65,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, > {} > }; > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c > index 873437be86d9..a35c97f9100a 100644 > --- a/drivers/edac/amd64_edac.c > +++ b/drivers/edac/amd64_edac.c > @@ -2253,6 +2253,15 @@ static struct amd64_family_type family_types[] = { > .dbam_to_cs = f17_base_addr_to_cs_size, > } > }, > + [F17_M70H_CPUS] = { > + .ctl_name = "F17h_M70h", > + .f0_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F0, > + .f6_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F6, > + .ops = { > + .early_channel_count = f17_early_channel_count, > + .dbam_to_cs = f17_base_addr_to_cs_size, > + } > + }, > }; > > /* > @@ -3241,6 +3250,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) > fam_type = &family_types[F17_M30H_CPUS]; > pvt->ops = &family_types[F17_M30H_CPUS].ops; > break; > + } else if (pvt->model >= 0x70 && pvt->model <= 0x7f) { > + fam_type = &family_types[F17_M70H_CPUS]; > + pvt->ops = &family_types[F17_M70H_CPUS].ops; > + break; > } > /* fall through */ > case 0x18: > diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h > index 8f66472f7adc..1adf7ddbf744 100644 > --- a/drivers/edac/amd64_edac.h > +++ b/drivers/edac/amd64_edac.h > @@ -119,6 +119,8 @@ > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490 > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496 > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F0 0x1440 > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446 > > /* > * Function 1 - Address Map > @@ -285,6 +287,7 @@ enum amd_families { > F17_CPUS, > F17_M10H_CPUS, > F17_M30H_CPUS, > + F17_M70H_CPUS, > NUM_FAMILIES, > }; > > diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c > index c77e89239dcd..5c1dddde193c 100644 > --- a/drivers/hwmon/k10temp.c > +++ b/drivers/hwmon/k10temp.c > @@ -349,6 +349,7 @@ static const struct pci_device_id k10temp_id_table[] = { > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, > + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, > { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > {} > }; > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > index c842735a4f45..4b97f427cc92 100644 > --- a/include/linux/pci_ids.h > +++ b/include/linux/pci_ids.h > @@ -548,6 +548,7 @@ > #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493 > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443 > #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 > #define PCI_DEVICE_ID_AMD_LANCE 0x2000 > #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 > -- > 2.23.0
On Fri, Sep 06, 2019 at 11:57:35AM +0000, Isaac Vaughn wrote: > Will do, thanks. And, when you reply to mails, please press "Reply-to-all" in your mail client and do not do private mails. There's a reason there's a Cc list. Readding them. > I built my patch on both 5.3.0rc7 and master, and have tested and > am currently running it on 5.3.0rc7. Which tag are you building > on? I suspect there is a version mismatch since ".dbam_to_cs = > f17_base_addr_to_cs_size" is on line 2262 for me and a recursive grep > of the entire returned no results for "f17_addr_mask_to_cs_size". Ah, yes, you couldn't have known that, lemme explain. So almost all maintainers have one or more branches which contain the work scheduled to go to Linus in the next merge window and that work is being merged on a daily basis into linux-next. The EDAC branch which has that is edac-for-next in the repo git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git Please use that one to base your patch on. That branch also has a previous patch which does this: -static int f17_base_addr_to_cs_size(struct amd64_pvt *pvt, u8 umc, +static int f17_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc, which explains the failure. Thx.
On Fri, Sep 06, 2019 at 11:12:50AM +0200, Borislav Petkov wrote: > On Fri, Sep 06, 2019 at 01:56:56AM +0000, Isaac Vaughn wrote: > > Add the new Family 17h Model 70h PCI IDs (device 18h functions 0,3,4,6) > > to the kernel, the hwmon module, and the AMD64 EDAC module. > > > > Signed-off-by: Isaac Vaughn <isaac.vaughn@knights.ucf.edu> > > --- > > arch/x86/kernel/amd_nb.c | 3 +++ > > drivers/edac/amd64_edac.c | 13 +++++++++++++ > > drivers/edac/amd64_edac.h | 3 +++ > > drivers/hwmon/k10temp.c | 1 + > > include/linux/pci_ids.h | 1 + > > 5 files changed, 21 insertions(+) > > Ok, next lessons :) > > Before you send a patch, do: > Also, how is this patch different to the patches already in linux-next ? Guenter > $ git diff | ./scripts/get_maintainer.pl > > or if you've committed it already: > > $ git log -p -1 | ./scripts/get_maintainer.pl > > to know who to Cc. > > I've added the respective mailing lists to Cc because this is a trivial > addition of PCI IDs and generally maintainers want to see it as an FYI > thing, thus Ccing the mailing list only. But you can just as well Cc the > maintainers too - they can manage the mail volume. :) > > And last but *definitely* not least, the most important lesson: *always* > - I can't stress this enough - *always* build *and* test your patch > before sending: > > drivers/edac/amd64_edac.c:2326:19: error: ‘f17_base_addr_to_cs_size’ undeclared here (not in a function); did you mean ‘f17_addr_mask_to_cs_size’? > .dbam_to_cs = f17_base_addr_to_cs_size, > ^~~~~~~~~~~~~~~~~~~~~~~~ > f17_addr_mask_to_cs_size > make[2]: *** [scripts/Makefile.build:273: drivers/edac/amd64_edac.o] Error 1 > make[2]: *** Waiting for unfinished jobs.... > make[1]: *** [scripts/Makefile.build:490: drivers/edac] Error 2 > make[1]: *** Waiting for unfinished jobs.... > make: *** [Makefile:1076: drivers] Error 2 > make: *** Waiting for unfinished jobs.... > > If it is any consolation: we have all done this mistake in a hurry at > least once in the past but pls do take your time. > > Thx. > > Leaving in the rest for reference for the newly CCed. > > > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > > index d63e63b7d1d9..0a8b816857c1 100644 > > --- a/arch/x86/kernel/amd_nb.c > > +++ b/arch/x86/kernel/amd_nb.c > > @@ -21,6 +21,7 @@ > > #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 > > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec > > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494 > > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444 > > > > /* Protect the PCI config register pairs used for SMN and DF indirect access. */ > > static DEFINE_MUTEX(smn_mutex); > > @@ -49,6 +50,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, > > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, > > {} > > }; > > @@ -63,6 +65,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, > > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) }, > > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, > > {} > > }; > > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c > > index 873437be86d9..a35c97f9100a 100644 > > --- a/drivers/edac/amd64_edac.c > > +++ b/drivers/edac/amd64_edac.c > > @@ -2253,6 +2253,15 @@ static struct amd64_family_type family_types[] = { > > .dbam_to_cs = f17_base_addr_to_cs_size, > > } > > }, > > + [F17_M70H_CPUS] = { > > + .ctl_name = "F17h_M70h", > > + .f0_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F0, > > + .f6_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F6, > > + .ops = { > > + .early_channel_count = f17_early_channel_count, > > + .dbam_to_cs = f17_base_addr_to_cs_size, > > + } > > + }, > > }; > > > > /* > > @@ -3241,6 +3250,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) > > fam_type = &family_types[F17_M30H_CPUS]; > > pvt->ops = &family_types[F17_M30H_CPUS].ops; > > break; > > + } else if (pvt->model >= 0x70 && pvt->model <= 0x7f) { > > + fam_type = &family_types[F17_M70H_CPUS]; > > + pvt->ops = &family_types[F17_M70H_CPUS].ops; > > + break; > > } > > /* fall through */ > > case 0x18: > > diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h > > index 8f66472f7adc..1adf7ddbf744 100644 > > --- a/drivers/edac/amd64_edac.h > > +++ b/drivers/edac/amd64_edac.h > > @@ -119,6 +119,8 @@ > > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee > > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490 > > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496 > > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F0 0x1440 > > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446 > > > > /* > > * Function 1 - Address Map > > @@ -285,6 +287,7 @@ enum amd_families { > > F17_CPUS, > > F17_M10H_CPUS, > > F17_M30H_CPUS, > > + F17_M70H_CPUS, > > NUM_FAMILIES, > > }; > > > > diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c > > index c77e89239dcd..5c1dddde193c 100644 > > --- a/drivers/hwmon/k10temp.c > > +++ b/drivers/hwmon/k10temp.c > > @@ -349,6 +349,7 @@ static const struct pci_device_id k10temp_id_table[] = { > > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, > > { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, > > + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, > > { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > > {} > > }; > > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > > index c842735a4f45..4b97f427cc92 100644 > > --- a/include/linux/pci_ids.h > > +++ b/include/linux/pci_ids.h > > @@ -548,6 +548,7 @@ > > #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 > > #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb > > #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493 > > +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443 > > #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 > > #define PCI_DEVICE_ID_AMD_LANCE 0x2000 > > #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 > > -- > > 2.23.0 > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette
On September 6, 2019 3:02:06 PM GMT+02:00, Guenter Roeck <linux@roeck-us.net> wrote: >Also, how is this patch different to the patches already in linux-next >? Which are those? Care to share their linux-next commit IDs with us?
On Fri, Sep 06, 2019 at 02:05:35PM +0000, Isaac Vaughn wrote: > They seem to have already covered the changes to hwmon and amd_nb, so > the difference is probably the changes to amd64_edac. Yeah, then you can send me only those changes against edac-for-next. The driver won't load on Zen2 before the amd_nb.c changes have landed upstream but that's fine - it's not like it did load before. Thx.
On Fri, Sep 06, 2019 at 03:09:16PM +0200, Boris Petkov wrote: > On September 6, 2019 3:02:06 PM GMT+02:00, Guenter Roeck <linux@roeck-us.net> wrote: > >Also, how is this patch different to the patches already in linux-next > >? > > Which are those? Care to share their linux-next commit IDs with us? > 12163cfbfc0f ("hwmon: (k10temp) Add support for AMD family 17h, model 70h CPUs") af4e1c5eca95 ("x86/amd_nb: Add PCI device IDs for family 17h, model 70h") Guenter
On Fri, Sep 06, 2019 at 09:11:40AM -0700, Guenter Roeck wrote: > 12163cfbfc0f ("hwmon: (k10temp) Add support for AMD family 17h, model 70h CPUs") > af4e1c5eca95 ("x86/amd_nb: Add PCI device IDs for family 17h, model 70h") Thanks!
> > They seem to have already covered the changes to hwmon and amd_nb, so > > the difference is probably the changes to amd64_edac. > > Yeah, then you can send me only those changes against edac-for-next. > The driver won't load on Zen2 before the amd_nb.c changes have landed > upstream but that's fine - it's not like it did load before. > > Thx. I made the changes against the git repo you linked and sent the patch. The updated module didn't do anything when tested, but that seems to be the expected behavior with the current amd_nb. Thanks, Isaac Vaughn
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index d63e63b7d1d9..0a8b816857c1 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -21,6 +21,7 @@ #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494 +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444 /* Protect the PCI config register pairs used for SMN and DF indirect access. */ static DEFINE_MUTEX(smn_mutex); @@ -49,6 +50,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, {} }; @@ -63,6 +65,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, {} }; diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 873437be86d9..a35c97f9100a 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2253,6 +2253,15 @@ static struct amd64_family_type family_types[] = { .dbam_to_cs = f17_base_addr_to_cs_size, } }, + [F17_M70H_CPUS] = { + .ctl_name = "F17h_M70h", + .f0_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F0, + .f6_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F6, + .ops = { + .early_channel_count = f17_early_channel_count, + .dbam_to_cs = f17_base_addr_to_cs_size, + } + }, }; /* @@ -3241,6 +3250,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) fam_type = &family_types[F17_M30H_CPUS]; pvt->ops = &family_types[F17_M30H_CPUS].ops; break; + } else if (pvt->model >= 0x70 && pvt->model <= 0x7f) { + fam_type = &family_types[F17_M70H_CPUS]; + pvt->ops = &family_types[F17_M70H_CPUS].ops; + break; } /* fall through */ case 0x18: diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 8f66472f7adc..1adf7ddbf744 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -119,6 +119,8 @@ #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490 #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496 +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F0 0x1440 +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446 /* * Function 1 - Address Map @@ -285,6 +287,7 @@ enum amd_families { F17_CPUS, F17_M10H_CPUS, F17_M30H_CPUS, + F17_M70H_CPUS, NUM_FAMILIES, }; diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index c77e89239dcd..5c1dddde193c 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -349,6 +349,7 @@ static const struct pci_device_id k10temp_id_table[] = { { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, {} }; diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index c842735a4f45..4b97f427cc92 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -548,6 +548,7 @@ #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493 +#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443 #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
Add the new Family 17h Model 70h PCI IDs (device 18h functions 0,3,4,6) to the kernel, the hwmon module, and the AMD64 EDAC module. Signed-off-by: Isaac Vaughn <isaac.vaughn@knights.ucf.edu> --- arch/x86/kernel/amd_nb.c | 3 +++ drivers/edac/amd64_edac.c | 13 +++++++++++++ drivers/edac/amd64_edac.h | 3 +++ drivers/hwmon/k10temp.c | 1 + include/linux/pci_ids.h | 1 + 5 files changed, 21 insertions(+)