| Message ID | 20190913141652.27958-1-mika.kuoppala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] drm/i915: Update Gen11 forcewake ranges | expand |
On 9/13/19 7:16 AM, Mika Kuoppala wrote: > Daniele noticed new render ranges in Gen11 fw table. > > Bspec: 18331 > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Daniele > --- > drivers/gpu/drm/i915/intel_uncore.c | 23 +++++++++-------------- > 1 file changed, 9 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 9e583f13a9e4..732082a72022 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -805,9 +805,6 @@ void assert_forcewakes_active(struct intel_uncore *uncore, > /* We give fast paths for the really cool registers */ > #define NEEDS_FORCE_WAKE(reg) ((reg) < 0x40000) > > -#define GEN11_NEEDS_FORCE_WAKE(reg) \ > - ((reg) < 0x40000 || ((reg) >= 0x1c0000 && (reg) < 0x1dc000)) > - > #define __gen6_reg_read_fw_domains(uncore, offset) \ > ({ \ > enum forcewake_domains __fwd; \ > @@ -903,12 +900,7 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = { > }) > > #define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \ > -({ \ > - enum forcewake_domains __fwd = 0; \ > - if (GEN11_NEEDS_FORCE_WAKE((offset))) \ > - __fwd = find_fw_domain(uncore, offset); \ > - __fwd; \ > -}) > + find_fw_domain(uncore, offset) > > /* *Must* be sorted by offset! See intel_shadow_table_check(). */ > static const i915_reg_t gen8_shadowed_regs[] = { > @@ -1005,8 +997,9 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { > #define __gen11_fwtable_reg_write_fw_domains(uncore, offset) \ > ({ \ > enum forcewake_domains __fwd = 0; \ > - if (GEN11_NEEDS_FORCE_WAKE((offset)) && !is_gen11_shadowed(offset)) \ > - __fwd = find_fw_domain(uncore, offset); \ > + const u32 __offset = (offset); \ > + if (!is_gen11_shadowed(__offset)) \ > + __fwd = find_fw_domain(uncore, __offset); \ > __fwd; \ > }) > > @@ -1065,9 +1058,11 @@ static const struct intel_forcewake_range __gen11_fw_ranges[] = { > GEN_FW_RANGE(0x9400, 0x97ff, FORCEWAKE_ALL), > GEN_FW_RANGE(0x9800, 0xafff, FORCEWAKE_BLITTER), > GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), > - GEN_FW_RANGE(0xb480, 0xdfff, FORCEWAKE_BLITTER), > - GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER), > - GEN_FW_RANGE(0xe900, 0x243ff, FORCEWAKE_BLITTER), > + GEN_FW_RANGE(0xb480, 0xdeff, FORCEWAKE_BLITTER), > + GEN_FW_RANGE(0xdf00, 0xe8ff, FORCEWAKE_RENDER), > + GEN_FW_RANGE(0xe900, 0x16dff, FORCEWAKE_BLITTER), > + GEN_FW_RANGE(0x16e00, 0x19fff, FORCEWAKE_RENDER), > + GEN_FW_RANGE(0x1a000, 0x243ff, FORCEWAKE_BLITTER), > GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER), > GEN_FW_RANGE(0x24800, 0x3ffff, FORCEWAKE_BLITTER), > GEN_FW_RANGE(0x40000, 0x1bffff, 0), >
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 9e583f13a9e4..732082a72022 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -805,9 +805,6 @@ void assert_forcewakes_active(struct intel_uncore *uncore, /* We give fast paths for the really cool registers */ #define NEEDS_FORCE_WAKE(reg) ((reg) < 0x40000) -#define GEN11_NEEDS_FORCE_WAKE(reg) \ - ((reg) < 0x40000 || ((reg) >= 0x1c0000 && (reg) < 0x1dc000)) - #define __gen6_reg_read_fw_domains(uncore, offset) \ ({ \ enum forcewake_domains __fwd; \ @@ -903,12 +900,7 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = { }) #define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \ -({ \ - enum forcewake_domains __fwd = 0; \ - if (GEN11_NEEDS_FORCE_WAKE((offset))) \ - __fwd = find_fw_domain(uncore, offset); \ - __fwd; \ -}) + find_fw_domain(uncore, offset) /* *Must* be sorted by offset! See intel_shadow_table_check(). */ static const i915_reg_t gen8_shadowed_regs[] = { @@ -1005,8 +997,9 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { #define __gen11_fwtable_reg_write_fw_domains(uncore, offset) \ ({ \ enum forcewake_domains __fwd = 0; \ - if (GEN11_NEEDS_FORCE_WAKE((offset)) && !is_gen11_shadowed(offset)) \ - __fwd = find_fw_domain(uncore, offset); \ + const u32 __offset = (offset); \ + if (!is_gen11_shadowed(__offset)) \ + __fwd = find_fw_domain(uncore, __offset); \ __fwd; \ }) @@ -1065,9 +1058,11 @@ static const struct intel_forcewake_range __gen11_fw_ranges[] = { GEN_FW_RANGE(0x9400, 0x97ff, FORCEWAKE_ALL), GEN_FW_RANGE(0x9800, 0xafff, FORCEWAKE_BLITTER), GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xb480, 0xdfff, FORCEWAKE_BLITTER), - GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER), - GEN_FW_RANGE(0xe900, 0x243ff, FORCEWAKE_BLITTER), + GEN_FW_RANGE(0xb480, 0xdeff, FORCEWAKE_BLITTER), + GEN_FW_RANGE(0xdf00, 0xe8ff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0xe900, 0x16dff, FORCEWAKE_BLITTER), + GEN_FW_RANGE(0x16e00, 0x19fff, FORCEWAKE_RENDER), + GEN_FW_RANGE(0x1a000, 0x243ff, FORCEWAKE_BLITTER), GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER), GEN_FW_RANGE(0x24800, 0x3ffff, FORCEWAKE_BLITTER), GEN_FW_RANGE(0x40000, 0x1bffff, 0),
Daniele noticed new render ranges in Gen11 fw table. Bspec: 18331 Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/intel_uncore.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-)