| Message ID | 20190924021849.3185-11-xiaowei.bao@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add the multiple PF support for DWC and Layerscape | expand |
On Tue, Sep 24, 2019 at 10:18:48AM +0800, Xiaowei Bao wrote: > Add PCIe EP node for ls1088a to support EP mode. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> > --- > v2: > - Remove the pf-offset proparty. > v3: > - No change. > v4: > - No change. > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 ++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > index c676d07..da246ab 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > @@ -483,6 +483,17 @@ > status = "disabled"; > }; > > + pcie_ep@3400000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > + reg = <0x00 0x03400000 0x0 0x00100000 > + 0x20 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <24>; > + num-ob-windows = <128>; > + max-functions = /bits/ 8 <2>; > + status = "disabled"; > + }; > + > pcie@3500000 { > compatible = "fsl,ls1088a-pcie"; > reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ > @@ -508,6 +519,16 @@ > status = "disabled"; > }; > > + pcie_ep@3500000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > + reg = <0x00 0x03500000 0x0 0x00100000 > + 0x28 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <6>; > + num-ob-windows = <8>; > + status = "disabled"; > + }; > + > pcie@3600000 { > compatible = "fsl,ls1088a-pcie"; > reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ > @@ -533,6 +554,16 @@ > status = "disabled"; > }; > > + pcie_ep@3600000 { > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; > + reg = <0x00 0x03600000 0x0 0x00100000 > + 0x30 0x00000000 0x8 0x00000000>; > + reg-names = "regs", "addr_space"; > + num-ib-windows = <6>; > + num-ob-windows = <8>; > + status = "disabled"; > + }; > + > smmu: iommu@5000000 { > compatible = "arm,mmu-500"; > reg = <0 0x5000000 0 0x800000>; > -- > 2.9.5 >
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index c676d07..da246ab 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -483,6 +483,17 @@ status = "disabled"; }; + pcie_ep@3400000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x20 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <24>; + num-ob-windows = <128>; + max-functions = /bits/ 8 <2>; + status = "disabled"; + }; + pcie@3500000 { compatible = "fsl,ls1088a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ @@ -508,6 +519,16 @@ status = "disabled"; }; + pcie_ep@3500000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x28 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + pcie@3600000 { compatible = "fsl,ls1088a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ @@ -533,6 +554,16 @@ status = "disabled"; }; + pcie_ep@3600000 { + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x30 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + smmu: iommu@5000000 { compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>;
Add PCIe EP node for ls1088a to support EP mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - Remove the pf-offset proparty. v3: - No change. v4: - No change. arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)