| Message ID | 20190925111941.88103-6-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: KVM: Add workaround for errata 1319367 and 1319537 | expand |
On Wed, Sep 25, 2019 at 12:19:41PM +0100, Marc Zyngier wrote: > Now that everything is in place, let's get the ball rolling > by allowing the corresponding config option to be selected. > Also add the required information to silicon_arrata.rst. > > Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Hi Marc, On 25/09/2019 12:19, Marc Zyngier wrote: > Now that everything is in place, let's get the ball rolling > by allowing the corresponding config option to be selected. > Also add the required information to silicon_arrata.rst. > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 3adcec05b1f6..c50cd4f83bc4 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -523,6 +523,16 @@ config ARM64_ERRATUM_1286807 > invalidated has been observed by other observers. The > workaround repeats the TLBI+DSB operation. > > +config ARM64_ERRATUM_1319367 > + bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" > + default y > + help > + This option adds work arounds for ARM Cortex-A57 erratum 1319537 > + and A72 erratum 1319367 > + > + Cortex-A57 and A72 cores could end-up with corrupted TLBs by > + speculating an AT instruction during a guest context switch. > + > If unsure, say Y. > > config ARM64_ERRATUM_1463225 > Nit: You pinched someone elses "If unsure, say Y."! Thanks, James
On Thu, 03 Oct 2019 12:11:00 +0100, James Morse <james.morse@arm.com> wrote: > > Hi Marc, > > On 25/09/2019 12:19, Marc Zyngier wrote: > > Now that everything is in place, let's get the ball rolling > > by allowing the corresponding config option to be selected. > > Also add the required information to silicon_arrata.rst. > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index 3adcec05b1f6..c50cd4f83bc4 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -523,6 +523,16 @@ config ARM64_ERRATUM_1286807 > > invalidated has been observed by other observers. The > > workaround repeats the TLBI+DSB operation. > > > > +config ARM64_ERRATUM_1319367 > > + bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" > > + default y > > + help > > + This option adds work arounds for ARM Cortex-A57 erratum 1319537 > > + and A72 erratum 1319367 > > + > > + Cortex-A57 and A72 cores could end-up with corrupted TLBs by > > + speculating an AT instruction during a guest context switch. > > + > > If unsure, say Y. > > > > config ARM64_ERRATUM_1463225 > > > > Nit: You pinched someone elses "If unsure, say Y."! Ah! Well spotted. Thanks, M.
diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index 3e57d09246e6..b90a977fc748 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -70,8 +70,12 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A57 | #1319537 | ARM64_ERRATUM_1319367 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A72 | #853709 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A72 | #1319367 | ARM64_ERRATUM_1319367 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 3adcec05b1f6..c50cd4f83bc4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -523,6 +523,16 @@ config ARM64_ERRATUM_1286807 invalidated has been observed by other observers. The workaround repeats the TLBI+DSB operation. +config ARM64_ERRATUM_1319367 + bool "Cortex-A57/A72: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" + default y + help + This option adds work arounds for ARM Cortex-A57 erratum 1319537 + and A72 erratum 1319367 + + Cortex-A57 and A72 cores could end-up with corrupted TLBs by + speculating an AT instruction during a guest context switch. + If unsure, say Y. config ARM64_ERRATUM_1463225
Now that everything is in place, let's get the ball rolling by allowing the corresponding config option to be selected. Also add the required information to silicon_arrata.rst. Signed-off-by: Marc Zyngier <maz@kernel.org> --- Documentation/arm64/silicon-errata.rst | 4 ++++ arch/arm64/Kconfig | 10 ++++++++++ 2 files changed, 14 insertions(+)