| Message ID | 20191010020655.3776-2-andrew@aj.id.au (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 5b468cc4b88073356f79cf779207d64b65a914f0 |
| Headers | show |
| Series | clk: aspeed: Expose RMII RCLK gate for MACs 1-2 on AST2500 | expand |
On Thu, 10 Oct 2019 at 02:05, Andrew Jeffery <andrew@aj.id.au> wrote: > > The AST2500 has an explicit gate for the RMII RCLK for each of the two > MACs. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au>
On Thu, 10 Oct 2019 12:36:54 +1030, Andrew Jeffery wrote: > The AST2500 has an explicit gate for the RMII RCLK for each of the two > MACs. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > --- > v2: Drop "_GATE" from symbol names > > include/dt-bindings/clock/aspeed-clock.h | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h index f43738607d77..9ff4f6e4558c 100644 --- a/include/dt-bindings/clock/aspeed-clock.h +++ b/include/dt-bindings/clock/aspeed-clock.h @@ -39,6 +39,8 @@ #define ASPEED_CLK_BCLK 33 #define ASPEED_CLK_MPLL 34 #define ASPEED_CLK_24M 35 +#define ASPEED_CLK_MAC1RCLK 36 +#define ASPEED_CLK_MAC2RCLK 37 #define ASPEED_RESET_XDMA 0 #define ASPEED_RESET_MCTP 1
The AST2500 has an explicit gate for the RMII RCLK for each of the two MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- v2: Drop "_GATE" from symbol names include/dt-bindings/clock/aspeed-clock.h | 2 ++ 1 file changed, 2 insertions(+)