diff mbox

[v3,1/2] x86: Enable fast strings on Intel if BIOS hasn't already

Message ID d9f3056c77b6cd44a2f4c90278ce483a011dda12.1312893572.git.luto@mit.edu (mailing list archive)
State New, archived
Headers show

Commit Message

Andrew Lutomirski Aug. 9, 2011, 12:41 p.m. UTC
Intel SDM volume 3A, 8.4.2 says:

  Software can disable fast-string operation by clearing the
  fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR.
  However, Intel recomments that system software always enable
  fast-string operation.

The Intel DQ67SW board (with latest BIOS) disables fast string
operations if TXT is enabled.  A Lenovo X220 disables it regardless
of TXT setting.  I doubt I'm the only person with a dumb BIOS like
this.

Signed-off-by: Andy Lutomirski <luto@mit.edu>
---
 arch/x86/kernel/cpu/intel.c |   28 +++++++++++++++++++++++-----
 1 files changed, 23 insertions(+), 5 deletions(-)

Comments

Fenghua Yu Aug. 9, 2011, 3:40 p.m. UTC | #1
> -----Original Message-----
> From: Andy Lutomirski [mailto:luto@MIT.EDU]
> Sent: Tuesday, August 09, 2011 5:41 AM
> To: x86@kernel.org; linux-kernel@vger.kernel.org
> Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux-
> acpi@vger.kernel.org; Ingo Molnar; Andy Lutomirski
> Subject: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
> hasn't already
> 
> Intel SDM volume 3A, 8.4.2 says:
> 
>   Software can disable fast-string operation by clearing the
>   fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR.
>   However, Intel recomments that system software always enable
>   fast-string operation.
> 
> The Intel DQ67SW board (with latest BIOS) disables fast string
> operations if TXT is enabled.  A Lenovo X220 disables it regardless
> of TXT setting.  I doubt I'm the only person with a dumb BIOS like
> this.
> 
> Signed-off-by: Andy Lutomirski <luto@mit.edu>
> ---
>  arch/x86/kernel/cpu/intel.c |   28 +++++++++++++++++++++++-----
>  1 files changed, 23 insertions(+), 5 deletions(-)

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>

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Andrew Lutomirski Aug. 10, 2011, 2:49 p.m. UTC | #2
On Tue, Aug 9, 2011 at 11:40 AM, Yu, Fenghua <fenghua.yu@intel.com> wrote:
>> -----Original Message-----
>> From: Andy Lutomirski [mailto:luto@MIT.EDU]
>> Sent: Tuesday, August 09, 2011 5:41 AM
>> To: x86@kernel.org; linux-kernel@vger.kernel.org
>> Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux-
>> acpi@vger.kernel.org; Ingo Molnar; Andy Lutomirski
>> Subject: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
>> hasn't already
>>
>> Intel SDM volume 3A, 8.4.2 says:
>>
>>   Software can disable fast-string operation by clearing the
>>   fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR.
>>   However, Intel recomments that system software always enable
>>   fast-string operation.
>>
>> The Intel DQ67SW board (with latest BIOS) disables fast string
>> operations if TXT is enabled.  A Lenovo X220 disables it regardless
>> of TXT setting.  I doubt I'm the only person with a dumb BIOS like
>> this.
>>
>> Signed-off-by: Andy Lutomirski <luto@mit.edu>
>> ---
>>  arch/x86/kernel/cpu/intel.c |   28 +++++++++++++++++++++++-----
>>  1 files changed, 23 insertions(+), 5 deletions(-)
>
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
>
>

Please don't apply.  This patch breaks !CONFIG_SMP.  I'll send a fixed
patch later on.

--Andy
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Fenghua Yu Aug. 10, 2011, 3:05 p.m. UTC | #3
> -----Original Message-----
> From: amluto@gmail.com [mailto:amluto@gmail.com] On Behalf Of Andrew
> Lutomirski
> Sent: Wednesday, August 10, 2011 7:50 AM
> To: Yu, Fenghua
> Cc: x86@kernel.org; linux-kernel@vger.kernel.org; Matthew Garrett; Len
> Brown; linux-acpi@vger.kernel.org; Ingo Molnar; Anvin, H Peter
> Subject: Re: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
> hasn't already
> 
> On Tue, Aug 9, 2011 at 11:40 AM, Yu, Fenghua <fenghua.yu@intel.com>
> wrote:
> >> -----Original Message-----
> >> From: Andy Lutomirski [mailto:luto@MIT.EDU]
> >> Sent: Tuesday, August 09, 2011 5:41 AM
> >> To: x86@kernel.org; linux-kernel@vger.kernel.org
> >> Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux-
> >> acpi@vger.kernel.org; Ingo Molnar; Andy Lutomirski
> >> Subject: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
> >> hasn't already
> >>
> >> Intel SDM volume 3A, 8.4.2 says:
> >>
> >>   Software can disable fast-string operation by clearing the
> >>   fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR.
> >>   However, Intel recomments that system software always enable
> >>   fast-string operation.
> >>
> >> The Intel DQ67SW board (with latest BIOS) disables fast string
> >> operations if TXT is enabled.  A Lenovo X220 disables it regardless
> >> of TXT setting.  I doubt I'm the only person with a dumb BIOS like
> >> this.
> >>
> >> Signed-off-by: Andy Lutomirski <luto@mit.edu>
> >> ---
> >>  arch/x86/kernel/cpu/intel.c |   28 +++++++++++++++++++++++-----
> >>  1 files changed, 23 insertions(+), 5 deletions(-)
> >
> > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
> >
> >
> 
> Please don't apply.  This patch breaks !CONFIG_SMP.  I'll send a fixed
> patch later on.

+				printk_once(KERN_INFO FW_WARN "CPU #%d: IA32_MISC_ENABLE.FAST_STRING_ENABLE was not set",
There is no need to print CPU id. Then there is no SMP issue.

Thanks.

-Fenghua


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Andrew Lutomirski Aug. 10, 2011, 3:11 p.m. UTC | #4
On Wed, Aug 10, 2011 at 11:05 AM, Yu, Fenghua <fenghua.yu@intel.com> wrote:
>> -----Original Message-----
>> From: amluto@gmail.com [mailto:amluto@gmail.com] On Behalf Of Andrew
>> Lutomirski
>> Sent: Wednesday, August 10, 2011 7:50 AM
>> To: Yu, Fenghua
>> Cc: x86@kernel.org; linux-kernel@vger.kernel.org; Matthew Garrett; Len
>> Brown; linux-acpi@vger.kernel.org; Ingo Molnar; Anvin, H Peter
>> Subject: Re: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
>> hasn't already
>>
>> On Tue, Aug 9, 2011 at 11:40 AM, Yu, Fenghua <fenghua.yu@intel.com>
>> wrote:
>> >> -----Original Message-----
>> >> From: Andy Lutomirski [mailto:luto@MIT.EDU]
>> >> Sent: Tuesday, August 09, 2011 5:41 AM
>> >> To: x86@kernel.org; linux-kernel@vger.kernel.org
>> >> Cc: Yu, Fenghua; Matthew Garrett; Len Brown; linux-
>> >> acpi@vger.kernel.org; Ingo Molnar; Andy Lutomirski
>> >> Subject: [PATCH v3 1/2] x86: Enable fast strings on Intel if BIOS
>> >> hasn't already
>> >>
>> >> Intel SDM volume 3A, 8.4.2 says:
>> >>
>> >>   Software can disable fast-string operation by clearing the
>> >>   fast-string-enable bit (bit 0) of IA32_MISC_ENABLE MSR.
>> >>   However, Intel recomments that system software always enable
>> >>   fast-string operation.
>> >>
>> >> The Intel DQ67SW board (with latest BIOS) disables fast string
>> >> operations if TXT is enabled.  A Lenovo X220 disables it regardless
>> >> of TXT setting.  I doubt I'm the only person with a dumb BIOS like
>> >> this.
>> >>
>> >> Signed-off-by: Andy Lutomirski <luto@mit.edu>
>> >> ---
>> >>  arch/x86/kernel/cpu/intel.c |   28 +++++++++++++++++++++++-----
>> >>  1 files changed, 23 insertions(+), 5 deletions(-)
>> >
>> > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
>> >
>> >
>>
>> Please don't apply.  This patch breaks !CONFIG_SMP.  I'll send a fixed
>> patch later on.
>
> +                               printk_once(KERN_INFO FW_WARN "CPU #%d: IA32_MISC_ENABLE.FAST_STRING_ENABLE was not set",
> There is no need to print CPU id. Then there is no SMP issue.

True, and with the printk_once change it's pointless.  I was printing
it because of the other patch: my BIOS enables monitor/mwait on some,
but not all, CPUs.  (Working around that is a little less optional.
My systems gets lucky because it's off on the boot CPU so the idle
loop doesn't call mwait.  If it were the other way around, the kernel
would presumably oops quickly.)

--Andy
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diff mbox

Patch

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index ed6086e..7d02873 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -30,6 +30,7 @@ 
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 {
 	u64 misc_enable;
+	bool allow_fast_string = true;
 
 	/* Unmask CPUID levels if masked: */
 	if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
@@ -118,10 +119,11 @@  static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 	 * (model 2) with the same problem.
 	 */
 	if (c->x86 == 15) {
-		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+		allow_fast_string = false;
 
+		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 		if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) {
-			printk(KERN_INFO "kmemcheck: Disabling fast string operations\n");
+			printk_once(KERN_INFO "kmemcheck: Disabling fast string operations\n");
 
 			misc_enable &= ~MSR_IA32_MISC_ENABLE_FAST_STRING;
 			wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
@@ -130,13 +132,29 @@  static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 #endif
 
 	/*
-	 * If fast string is not enabled in IA32_MISC_ENABLE for any reason,
-	 * clear the fast string and enhanced fast string CPU capabilities.
+	 * If BIOS didn't enable fast string operation, try to enable
+	 * it ourselves.  If that fails, then clear the fast string
+	 * and enhanced fast string CPU capabilities.
 	 */
 	if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
 		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+		if (allow_fast_string &&
+		    !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) {
+			misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING;
+			wrmsr_safe(MSR_IA32_MISC_ENABLE, (u32)misc_enable,
+				   (u32)(misc_enable >> 32));
+
+			/* Re-read to make sure it stuck. */
+			rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+
+			if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)
+				printk_once(KERN_INFO FW_WARN "CPU #%d: IA32_MISC_ENABLE.FAST_STRING_ENABLE was not set",
+				       c->cpu_index);
+		}
+
 		if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) {
-			printk(KERN_INFO "Disabled fast string operations\n");
+			printk_once(KERN_INFO "Failed to enable fast string operations\n");
 			setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
 			setup_clear_cpu_cap(X86_FEATURE_ERMS);
 		}