diff mbox series

[v7,1/4] drm: Add a new helper drm_color_ctm_s31_32_to_qm_n()

Message ID 20191023064226.10969-2-james.qian.wang@arm.com (mailing list archive)
State New, archived
Headers show
Series drm/komeda: Enable CRTC color-mgmt | expand

Commit Message

James Qian Wang Oct. 23, 2019, 6:42 a.m. UTC
Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to
convert S31.32 sign-magnitude to Qm.n 2's complement that supported by
hardware.

V4: Address Mihai, Daniel and Ilia's review comments.
V5: Includes the sign bit in the value of m (Qm.n).
V6: Allows m = 0 according to Mihail's comments.
V6: Address Mihail's comments.

Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/drm_color_mgmt.c | 36 ++++++++++++++++++++++++++++++++
 include/drm/drm_color_mgmt.h     |  2 ++
 2 files changed, 38 insertions(+)

Comments

Mihail Atanassov Oct. 24, 2019, 10:29 a.m. UTC | #1
Hi James,

You already have my r-b on the patch, so for posterity: no further
important comments from my side.

On Wednesday, 23 October 2019 07:42:55 BST james qian wang (Arm Technology China) wrote:
> Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to
> convert S31.32 sign-magnitude to Qm.n 2's complement that supported by
> hardware.
> 
> V4: Address Mihai, Daniel and Ilia's review comments.
> V5: Includes the sign bit in the value of m (Qm.n).
> V6: Allows m = 0 according to Mihail's comments.
> V6: Address Mihail's comments.
> 
> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com>
> Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/drm_color_mgmt.c | 36 ++++++++++++++++++++++++++++++++
>  include/drm/drm_color_mgmt.h     |  2 ++
>  2 files changed, 38 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
> index 4ce5c6d8de99..f5fba5802a07 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -132,6 +132,42 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision)
>  }
>  EXPORT_SYMBOL(drm_color_lut_extract);
>  
> +/**
> + * drm_color_ctm_s31_32_to_qm_n
> + *
> + * @user_input: input value
> + * @m: number of integer bits, only support m <= 32, include the sign-bit
> + * @n: number of fractional bits, only support n <= 32
> + *
> + * Convert and clamp S31.32 sign-magnitude to Qm.n (signed 2's complement).
> + * The sign-bit BIT(m+n) and above are 0 for positive value and 1 for negative.

[really pedantic] m+n-1 :)

> + * the range of value is [-2^(m-1), 2^(m-1) - 2^-n]
> + *
> + * For example
> + * A Q3.12 format number:
> + * - required bit: 3 + 12 = 15bits
> + * - range: [-2^2, 2^2 - 2^−15]
> + *
> + * NOTE: the m can be zero if all bit_precision are used to present fractional
> + *       bits like Q0.32
> + */
> +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
> +				      uint32_t m, uint32_t n)
> +{
> +	u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n);
> +	bool negative = !!(user_input & BIT_ULL(63));
> +	s64 val;
> +
> +	WARN_ON(m > 32 || n > 32);
> +
> +
> +	val = clamp_val(mag, 0, negative ?
> +				BIT_ULL(n + m - 1) : BIT_ULL(n + m - 1) - 1);
> +
> +	return negative ? -val : val;
> +}
> +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n);
> +
>  /**
>   * drm_crtc_enable_color_mgmt - enable color management properties
>   * @crtc: DRM CRTC
> diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> index d1c662d92ab7..60fea5501886 100644
> --- a/include/drm/drm_color_mgmt.h
> +++ b/include/drm/drm_color_mgmt.h
> @@ -30,6 +30,8 @@ struct drm_crtc;
>  struct drm_plane;
>  
>  uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision);
> +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
> +				      uint32_t m, uint32_t n);
>  
>  void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,
>  				uint degamma_lut_size,
> -- 
> 2.20.1
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 4ce5c6d8de99..f5fba5802a07 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -132,6 +132,42 @@  uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision)
 }
 EXPORT_SYMBOL(drm_color_lut_extract);
 
+/**
+ * drm_color_ctm_s31_32_to_qm_n
+ *
+ * @user_input: input value
+ * @m: number of integer bits, only support m <= 32, include the sign-bit
+ * @n: number of fractional bits, only support n <= 32
+ *
+ * Convert and clamp S31.32 sign-magnitude to Qm.n (signed 2's complement).
+ * The sign-bit BIT(m+n) and above are 0 for positive value and 1 for negative.
+ * the range of value is [-2^(m-1), 2^(m-1) - 2^-n]
+ *
+ * For example
+ * A Q3.12 format number:
+ * - required bit: 3 + 12 = 15bits
+ * - range: [-2^2, 2^2 - 2^−15]
+ *
+ * NOTE: the m can be zero if all bit_precision are used to present fractional
+ *       bits like Q0.32
+ */
+uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
+				      uint32_t m, uint32_t n)
+{
+	u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n);
+	bool negative = !!(user_input & BIT_ULL(63));
+	s64 val;
+
+	WARN_ON(m > 32 || n > 32);
+
+
+	val = clamp_val(mag, 0, negative ?
+				BIT_ULL(n + m - 1) : BIT_ULL(n + m - 1) - 1);
+
+	return negative ? -val : val;
+}
+EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n);
+
 /**
  * drm_crtc_enable_color_mgmt - enable color management properties
  * @crtc: DRM CRTC
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index d1c662d92ab7..60fea5501886 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -30,6 +30,8 @@  struct drm_crtc;
 struct drm_plane;
 
 uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision);
+uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
+				      uint32_t m, uint32_t n);
 
 void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,
 				uint degamma_lut_size,