| Message ID | 20190902034319.14026-1-xiaowei.bao@nxp.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Commit | d8725e38dd9fe88bc7dab6e53acdf2e257c241db |
| Headers | show |
| Series | [v6,1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl,ls1028a-pcie" | expand |
On Mon, Sep 02, 2019 at 11:43:17AM +0800, Xiaowei Bao wrote: > Add the PCIe compatible string for LS1028A > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- Reviewed-by: Andrew Murray <andrew.murray@arm.com> > v2: > - No change. > v3: > - No change. > v4: > - No change. > v5: > - No change. > v6: > - No change. > > Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > index e20ceaa..99a386e 100644 > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > @@ -21,6 +21,7 @@ Required properties: > "fsl,ls1046a-pcie" > "fsl,ls1043a-pcie" > "fsl,ls1012a-pcie" > + "fsl,ls1028a-pcie" > EP mode: > "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" > - reg: base addresses and lengths of the PCIe controller register blocks. > -- > 2.9.5 >
On Mon, Sep 02, 2019 at 11:43:17AM +0800, Xiaowei Bao wrote: > Add the PCIe compatible string for LS1028A Sentences must be terminated with a period. > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > v2: > - No change. > v3: > - No change. > v4: > - No change. > v5: > - No change. > v6: > - No change. > > Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > index e20ceaa..99a386e 100644 > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > @@ -21,6 +21,7 @@ Required properties: > "fsl,ls1046a-pcie" > "fsl,ls1043a-pcie" > "fsl,ls1012a-pcie" > + "fsl,ls1028a-pcie" > EP mode: > "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" > - reg: base addresses and lengths of the PCIe controller register blocks. I have applied this series to pci/layerscape, thanks. Lorenzo
> -----Original Message----- > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Sent: 2019年11月7日 0:10 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>; > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linuxppc-dev@lists.ozlabs.org; bhelgaas@google.com; Z.q. Hou > <zhiqiang.hou@nxp.com> > Subject: Re: [PATCH v6 1/3] dt-bindings: pci: layerscape-pci: add compatible > strings "fsl,ls1028a-pcie" > > On Mon, Sep 02, 2019 at 11:43:17AM +0800, Xiaowei Bao wrote: > > Add the PCIe compatible string for LS1028A > > Sentences must be terminated with a period. > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > --- > > v2: > > - No change. > > v3: > > - No change. > > v4: > > - No change. > > v5: > > - No change. > > v6: > > - No change. > > > > Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > index e20ceaa..99a386e 100644 > > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > > @@ -21,6 +21,7 @@ Required properties: > > "fsl,ls1046a-pcie" > > "fsl,ls1043a-pcie" > > "fsl,ls1012a-pcie" > > + "fsl,ls1028a-pcie" > > EP mode: > > "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" > > - reg: base addresses and lengths of the PCIe controller register blocks. > > I have applied this series to pci/layerscape, thanks. Thank you for your corrections and comments, I will pay attention to the details and quality of each patch in the future. > > Lorenzo
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index e20ceaa..99a386e 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -21,6 +21,7 @@ Required properties: "fsl,ls1046a-pcie" "fsl,ls1043a-pcie" "fsl,ls1012a-pcie" + "fsl,ls1028a-pcie" EP mode: "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks.