Message ID | 20191106141424.27244-3-edgar.iglesias@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/microblaze: Plug tcg temp leaks | expand |
On 11/6/19 3:14 PM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Plug temp leaks with delay slot setup. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/microblaze/translate.c | 26 ++++++++++++++------------ > 1 file changed, 14 insertions(+), 12 deletions(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > index ba143ede5f..e9ff9e650d 100644 > --- a/target/microblaze/translate.c > +++ b/target/microblaze/translate.c > @@ -1201,6 +1201,17 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i64 pc_true, TCGv_i64 pc_false) > tcg_temp_free_i64(tmp_zero); > } > > +static void dec_setup_dslot(DisasContext *dc) > +{ > + TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); > + > + dc->delayed_branch = 2; > + dc->tb_flags |= D_FLAG; > + > + tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); > + tcg_temp_free_i32(tmp); > +} > + > static void dec_bcc(DisasContext *dc) > { > unsigned int cc; > @@ -1212,10 +1223,7 @@ static void dec_bcc(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > > if (dec_alu_op_b_is_small_imm(dc)) { > @@ -1274,10 +1282,7 @@ static void dec_br(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > if (link && dc->rd) > tcg_gen_movi_i32(cpu_R[dc->rd], dc->pc); > @@ -1379,10 +1384,7 @@ static void dec_rts(DisasContext *dc) > return; > } > > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > > if (i_bit) { > LOG_DIS("rtid ir=%x\n", dc->ir); > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
On 11/6/19 3:14 PM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Plug temp leaks with delay slot setup. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/microblaze/translate.c | 26 ++++++++++++++------------ > 1 file changed, 14 insertions(+), 12 deletions(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > index ba143ede5f..e9ff9e650d 100644 > --- a/target/microblaze/translate.c > +++ b/target/microblaze/translate.c > @@ -1201,6 +1201,17 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i64 pc_true, TCGv_i64 pc_false) > tcg_temp_free_i64(tmp_zero); > } > > +static void dec_setup_dslot(DisasContext *dc) > +{ > + TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); > + > + dc->delayed_branch = 2; > + dc->tb_flags |= D_FLAG; > + > + tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); > + tcg_temp_free_i32(tmp); > +} > + > static void dec_bcc(DisasContext *dc) > { > unsigned int cc; > @@ -1212,10 +1223,7 @@ static void dec_bcc(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > > if (dec_alu_op_b_is_small_imm(dc)) { > @@ -1274,10 +1282,7 @@ static void dec_br(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > if (link && dc->rd) > tcg_gen_movi_i32(cpu_R[dc->rd], dc->pc); > @@ -1379,10 +1384,7 @@ static void dec_rts(DisasContext *dc) > return; > } > > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > > if (i_bit) { > LOG_DIS("rtid ir=%x\n", dc->ir); > Reviewed-by: Luc Michel <luc.michel@greensocs.com>
On Wed, Nov 6, 2019 at 6:17 AM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Plug temp leaks with delay slot setup. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/microblaze/translate.c | 26 ++++++++++++++------------ > 1 file changed, 14 insertions(+), 12 deletions(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > index ba143ede5f..e9ff9e650d 100644 > --- a/target/microblaze/translate.c > +++ b/target/microblaze/translate.c > @@ -1201,6 +1201,17 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i64 pc_true, TCGv_i64 pc_false) > tcg_temp_free_i64(tmp_zero); > } > > +static void dec_setup_dslot(DisasContext *dc) > +{ > + TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); > + > + dc->delayed_branch = 2; > + dc->tb_flags |= D_FLAG; > + > + tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); > + tcg_temp_free_i32(tmp); > +} > + > static void dec_bcc(DisasContext *dc) > { > unsigned int cc; > @@ -1212,10 +1223,7 @@ static void dec_bcc(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > > if (dec_alu_op_b_is_small_imm(dc)) { > @@ -1274,10 +1282,7 @@ static void dec_br(DisasContext *dc) > > dc->delayed_branch = 1; > if (dslot) { > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > } > if (link && dc->rd) > tcg_gen_movi_i32(cpu_R[dc->rd], dc->pc); > @@ -1379,10 +1384,7 @@ static void dec_rts(DisasContext *dc) > return; > } > > - dc->delayed_branch = 2; > - dc->tb_flags |= D_FLAG; > - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), > - cpu_env, offsetof(CPUMBState, bimm)); > + dec_setup_dslot(dc); > > if (i_bit) { > LOG_DIS("rtid ir=%x\n", dc->ir); > -- > 2.20.1 > >
On 11/6/19 3:14 PM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Plug temp leaks with delay slot setup. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/microblaze/translate.c | 26 ++++++++++++++------------ > 1 file changed, 14 insertions(+), 12 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index ba143ede5f..e9ff9e650d 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1201,6 +1201,17 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i64 pc_true, TCGv_i64 pc_false) tcg_temp_free_i64(tmp_zero); } +static void dec_setup_dslot(DisasContext *dc) +{ + TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); + + dc->delayed_branch = 2; + dc->tb_flags |= D_FLAG; + + tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); + tcg_temp_free_i32(tmp); +} + static void dec_bcc(DisasContext *dc) { unsigned int cc; @@ -1212,10 +1223,7 @@ static void dec_bcc(DisasContext *dc) dc->delayed_branch = 1; if (dslot) { - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); } if (dec_alu_op_b_is_small_imm(dc)) { @@ -1274,10 +1282,7 @@ static void dec_br(DisasContext *dc) dc->delayed_branch = 1; if (dslot) { - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); } if (link && dc->rd) tcg_gen_movi_i32(cpu_R[dc->rd], dc->pc); @@ -1379,10 +1384,7 @@ static void dec_rts(DisasContext *dc) return; } - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); if (i_bit) { LOG_DIS("rtid ir=%x\n", dc->ir);