| Message ID | 20191115114549.23716-3-abdiel.janulgue@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core | expand |
Quoting Abdiel Janulgue (2019-11-15 11:45:48) > Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall- > back to GTT mmaps when hw doesn't support PAT > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 ++ > drivers/gpu/drm/i915/i915_drv.c | 1 + > 3 files changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c > index d2ed8a463672..c1756e4f46b9 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c > @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file, > return ret; > } > > +int > +i915_gem_mmap_dumb(struct drm_file *file, > + struct drm_device *dev, > + u32 handle, > + u64 *offset) > +{ > + enum i915_mmap_type mmap_type; > + > + if (boot_cpu_has(X86_FEATURE_PAT)) > + mmap_type = I915_MMAP_TYPE_WC; > + else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt)) > + return -ENODEV; > + else > + mmap_type = I915_MMAP_TYPE_GTT; > + > + return __assign_gem_object_mmap_data(file, handle, mmap_type, offset); Looks ok. Just a few nagging doubts about potential existing misuse by userspace, such as are very using tiling on their dumb buffer, are they passing in a non-dumb handle? Of course we will need to beat igt into shape first, as a few pipe-crc results suggests some not smart use of dumb buffers. -Chris
Quoting Chris Wilson (2019-11-15 13:54:16) > Quoting Abdiel Janulgue (2019-11-15 11:45:48) > > Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall- > > back to GTT mmaps when hw doesn't support PAT > > > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > > Cc: Matthew Auld <matthew.auld@intel.com> > > --- > > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++ > > drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 ++ > > drivers/gpu/drm/i915/i915_drv.c | 1 + > > 3 files changed, 21 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c > > index d2ed8a463672..c1756e4f46b9 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c > > @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file, > > return ret; > > } > > > > +int > > +i915_gem_mmap_dumb(struct drm_file *file, > > + struct drm_device *dev, > > + u32 handle, > > + u64 *offset) > > +{ > > + enum i915_mmap_type mmap_type; > > + > > + if (boot_cpu_has(X86_FEATURE_PAT)) > > + mmap_type = I915_MMAP_TYPE_WC; > > + else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt)) > > + return -ENODEV; > > + else > > + mmap_type = I915_MMAP_TYPE_GTT; > > + > > + return __assign_gem_object_mmap_data(file, handle, mmap_type, offset); > > Looks ok. Just a few nagging doubts about potential existing misuse by > userspace, such as are very using tiling on their dumb buffer, are they > passing in a non-dumb handle? Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Userspace review pending. -Chris
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index d2ed8a463672..c1756e4f46b9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file, return ret; } +int +i915_gem_mmap_dumb(struct drm_file *file, + struct drm_device *dev, + u32 handle, + u64 *offset) +{ + enum i915_mmap_type mmap_type; + + if (boot_cpu_has(X86_FEATURE_PAT)) + mmap_type = I915_MMAP_TYPE_WC; + else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt)) + return -ENODEV; + else + mmap_type = I915_MMAP_TYPE_GTT; + + return __assign_gem_object_mmap_data(file, handle, mmap_type, offset); +} + /** * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing * @dev: DRM device diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h index 4d3b493e853a..6e70b91dabc4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h @@ -24,6 +24,8 @@ void i915_mmap_offset_destroy(struct i915_mmap_offset *mmo, struct mutex *mutex) void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj); void i915_gem_object_release_mmap(struct drm_i915_gem_object *obj); void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj); +int i915_gem_mmap_dumb(struct drm_file *file_priv, struct drm_device *dev, + u32 handle, u64 *offset); int i915_gem_mmap_gtt_version(void); #endif diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index ac6d4470ce75..f7db0bbbe302 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -2767,6 +2767,7 @@ static struct drm_driver driver = { .get_scanout_position = i915_get_crtc_scanoutpos, .dumb_create = i915_gem_dumb_create, + .dumb_map_offset = i915_gem_mmap_dumb, .ioctls = i915_ioctls, .num_ioctls = ARRAY_SIZE(i915_ioctls), .fops = &i915_driver_fops,
Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall- back to GTT mmaps when hw doesn't support PAT Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 ++ drivers/gpu/drm/i915/i915_drv.c | 1 + 3 files changed, 21 insertions(+)