| Message ID | 1573756521-27373-1-git-send-email-ilina@codeaurora.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | Support wakeup capable GPIOs | expand |
Hi Lina, On 2019-11-14 18:35, Lina Iyer wrote: > Hi all, > > Thanks for all the reviews. > > Here is the next spin of the wakeup capable GPIO support. In order to > facilitate basic support available in the kernel, I have dropped the > SPI > register configuration. The feature was added when this series was > restarted based on new hierarchy support in gpiolib. But, the SPI > configuration can be done in the firmware. This would avoid a whole > lot > of code in linux that serve little to no purpose. Users of GPIO never > have the need to change the trigger type (level edge and vice-versa) > and > the basic configuration can be set in the firmware before boot. > > Changes in v1: > - Address review comments > - Add Reviewed-by tags > - Drop SPI config patches > - Rebase on top of Rajendra's PDC changes [6] > > Changes in RFC v2[5]: > - Address review comments #3, #4, #6, #7, #8, #9, #10 > - Rebased on top of linux-next GPIO latest patches > [1],[3],[4] > - Increase PDC max irqs in #2 (avoid merge conflicts with > downstream) > - Add Reviewed-by #5 > > Please consider reviewing these patches. It has been a long time coming, and I'm minded to take the first 9 patches into the irqchip tree. Anyone objects? The last 3 patches can go via the platform maintainer tree. M.
On Fri, Nov 15 2019 at 03:36 -0700, Marc Zyngier wrote: >Hi Lina, > >On 2019-11-14 18:35, Lina Iyer wrote: >>Hi all, >> >>Thanks for all the reviews. >> >>Here is the next spin of the wakeup capable GPIO support. In order to >>facilitate basic support available in the kernel, I have dropped the >>SPI >>register configuration. The feature was added when this series was >>restarted based on new hierarchy support in gpiolib. But, the SPI >>configuration can be done in the firmware. This would avoid a whole >>lot >>of code in linux that serve little to no purpose. Users of GPIO never >>have the need to change the trigger type (level edge and vice-versa) >>and >>the basic configuration can be set in the firmware before boot. >> >>Changes in v1: >> - Address review comments >> - Add Reviewed-by tags >> - Drop SPI config patches >> - Rebase on top of Rajendra's PDC changes [6] >> >>Changes in RFC v2[5]: >> - Address review comments #3, #4, #6, #7, #8, #9, #10 >> - Rebased on top of linux-next GPIO latest patches >>[1],[3],[4] >> - Increase PDC max irqs in #2 (avoid merge conflicts with >> downstream) >> - Add Reviewed-by #5 >> >>Please consider reviewing these patches. > >It has been a long time coming, and I'm minded to take the first 9 >patches into the irqchip tree. Anyone objects? The last 3 patches >can go via the platform maintainer tree. > Sounds good Marc. Thanks, Lina
Quoting Lina Iyer (2019-11-14 10:35:09) > Hi all, > > Thanks for all the reviews. > > Here is the next spin of the wakeup capable GPIO support. In order to > facilitate basic support available in the kernel, I have dropped the SPI > register configuration. The feature was added when this series was > restarted based on new hierarchy support in gpiolib. But, the SPI > configuration can be done in the firmware. This would avoid a whole lot > of code in linux that serve little to no purpose. Users of GPIO never > have the need to change the trigger type (level edge and vice-versa) and > the basic configuration can be set in the firmware before boot. Awesome! I'm glad we don't need to worry about configuring that in the kernel.
Hi all, Thanks for all the reviews. Here is the next spin of the wakeup capable GPIO support. In order to facilitate basic support available in the kernel, I have dropped the SPI register configuration. The feature was added when this series was restarted based on new hierarchy support in gpiolib. But, the SPI configuration can be done in the firmware. This would avoid a whole lot of code in linux that serve little to no purpose. Users of GPIO never have the need to change the trigger type (level edge and vice-versa) and the basic configuration can be set in the firmware before boot. Changes in v1: - Address review comments - Add Reviewed-by tags - Drop SPI config patches - Rebase on top of Rajendra's PDC changes [6] Changes in RFC v2[5]: - Address review comments #3, #4, #6, #7, #8, #9, #10 - Rebased on top of linux-next GPIO latest patches [1],[3],[4] - Increase PDC max irqs in #2 (avoid merge conflicts with downstream) - Add Reviewed-by #5 Please consider reviewing these patches. Thanks, Lina [1]. https://lore.kernel.org/linux-gpio/20190808123242.5359-1-linus.walleij@linaro.org/ [2]. https://lkml.org/lkml/2019/5/7/1173 [3]. https://lore.kernel.org/r/20190819084904.30027-1-linus.walleij@linaro.org [4]. https://lore.kernel.org/r/20190724083828.7496-1-linus.walleij@linaro.org [5]. https://lore.kernel.org/linux-gpio/5da6b849.1c69fb81.a9b04.1b9f@mx.google.com/t/ [6]. https://lore.kernel.org/linux-arm-msm/d622482d92059533f03b65af26c69b9b@www.loen.fr/ Lina Iyer (10): irqdomain: add bus token DOMAIN_BUS_WAKEUP drivers: irqchip: qcom-pdc: update max PDC interrupts drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs of: irq: document properties for wakeup interrupt parent drivers: pinctrl: msm: setup GPIO chip in hierarchy drivers: pinctrl: sdm845: add PDC wakeup interrupt map for GPIOs arm64: dts: qcom: add PDC interrupt controller for SDM845 arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845 arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Maulik Shah (2): genirq: Introduce irq_chip_get/set_parent_state calls drivers: irqchip: pdc: Add irqchip set/get state calls .../bindings/interrupt-controller/interrupts.txt | 12 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++ arch/arm64/configs/defconfig | 1 + drivers/irqchip/qcom-pdc.c | 147 +++++++++++++++++++-- drivers/pinctrl/qcom/pinctrl-msm.c | 113 ++++++++++++++++ drivers/pinctrl/qcom/pinctrl-msm.h | 16 +++ drivers/pinctrl/qcom/pinctrl-sdm845.c | 23 +++- include/linux/irq.h | 6 + include/linux/irqdomain.h | 1 + include/linux/soc/qcom/irq.h | 34 +++++ kernel/irq/chip.c | 44 ++++++ 11 files changed, 393 insertions(+), 14 deletions(-) create mode 100644 include/linux/soc/qcom/irq.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project