| Message ID | 20191119031240.7779-2-sean.j.christopherson@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | x86/cpu: Clean up handling of VMX features | expand |
On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > are quite a mouthful, especially the VMX bits which must differentiate > between enabling VMX inside and outside SMX (TXT) operation. Rename the > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > little friendlier on the eyes. Keep the full name for the MSR itself to > help even the most obtuse reader decipher the abbreviation, and to match > the name used by the Intel SDM. > > Opportunistically fix a few other annoyances with the defines: > > - Relocate the bit defines so that they immediately follow the MSR > define, e.g. aren't mistaken as belonging to MISC_FEATURE_CONTROL. > - Add whitespace around the block of feature control defines to make > it clear that FEAT_CTL is indeed short for FEATURE_CONTROL. > - Use BIT() instead of manually encoding the bit shift. > - Use "VMX" instead of "VMXON" to match the SDM. > - Append "_ENABLED" to the LMCE bit to be consistent with the verbiage > used for all other feature control bits. (LCME is an acronym for > Local Machine Check Exception, i.e. LMCE_ENABLED is not redundant). Sure but SDM calls it LMCE_ON. What is our current decision on sticking to SDM bit names? I guess we don't... But above you say "to match the SDM"... Thx.
On Tue, Nov 19, 2019 at 12:15:08PM +0100, Borislav Petkov wrote: > On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > > are quite a mouthful, especially the VMX bits which must differentiate > > between enabling VMX inside and outside SMX (TXT) operation. Rename the > > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > > little friendlier on the eyes. Keep the full name for the MSR itself to > > help even the most obtuse reader decipher the abbreviation, and to match > > the name used by the Intel SDM. > > > > Opportunistically fix a few other annoyances with the defines: > > > > - Relocate the bit defines so that they immediately follow the MSR > > define, e.g. aren't mistaken as belonging to MISC_FEATURE_CONTROL. > > - Add whitespace around the block of feature control defines to make > > it clear that FEAT_CTL is indeed short for FEATURE_CONTROL. > > - Use BIT() instead of manually encoding the bit shift. > > - Use "VMX" instead of "VMXON" to match the SDM. > > - Append "_ENABLED" to the LMCE bit to be consistent with the verbiage > > used for all other feature control bits. (LCME is an acronym for > > Local Machine Check Exception, i.e. LMCE_ENABLED is not redundant). > > Sure but SDM calls it LMCE_ON. What is our current decision on sticking > to SDM bit names? I guess we don't... > > But above you say "to match the SDM"... Ugh. Match the SDM unless it's obviously "wrong"? :-) It might literally be the only instance of the SDM using "on" instead of "enable(d)" for an MSR or CR bit. The SDM even refers to it as an enable bit, e.g. "platform software has not enabled LMCE by setting IA32_FEATURE_CONTROL.LMCE_ON (bit 20)". Whining aside, I'm ok going with LMCE_ON, I have a feeling "on" was deliberately chosen differentiate it from IA32_MCG_EXT_CTL.LMCE_EN.
On Tue, Nov 19, 2019 at 03:18:22PM -0800, Sean Christopherson wrote: > Ugh. Match the SDM unless it's obviously "wrong"? :-) It might literally > be the only instance of the SDM using "on" instead of "enable(d)" for an > MSR or CR bit. The SDM even refers to it as an enable bit, e.g. "platform > software has not enabled LMCE by setting IA32_FEATURE_CONTROL.LMCE_ON (bit 20)". > > Whining aside, I'm ok going with LMCE_ON, I have a feeling "on" was > deliberately chosen differentiate it from IA32_MCG_EXT_CTL.LMCE_EN. Nah, ok, let's leave this as a one-off case where the SDM is simply wrong but otherwise the bit names are correct and we keep them the same as in the SDM to avoid obvious confusion. Thx.
On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > are quite a mouthful, especially the VMX bits which must differentiate > between enabling VMX inside and outside SMX (TXT) operation. Rename the > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > little friendlier on the eyes. Keep the full name for the MSR itself to > help even the most obtuse reader decipher the abbreviation, and to match > the name used by the Intel SDM. If you anyway shorten the prefix, why not then go directly to FT_CTL? It is as obvious as FEAT_CTL is. Given the exhausting long variable names like FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX this would be worth of considering. /Jarkko
On Thu, Nov 21, 2019 at 11:46:14AM +0200, Jarkko Sakkinen wrote: > On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > > are quite a mouthful, especially the VMX bits which must differentiate > > between enabling VMX inside and outside SMX (TXT) operation. Rename the > > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > > little friendlier on the eyes. Keep the full name for the MSR itself to > > help even the most obtuse reader decipher the abbreviation, and to match > > the name used by the Intel SDM. > > If you anyway shorten the prefix, why not then go directly to FT_CTL? > It is as obvious as FEAT_CTL is. Given the exhausting long variable > names like FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX this would be worth of > considering. If we're going to rename the function and file, I think we should stick with the slightly longer FEAT_CTL. FT_CTL for the bits is ok since there is more context to work with, but init_ft_ctl_msr() looks weird to me.
On Thu, Nov 21, 2019 at 02:14:08PM -0800, Sean Christopherson wrote: > On Thu, Nov 21, 2019 at 11:46:14AM +0200, Jarkko Sakkinen wrote: > > On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > > > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > > > are quite a mouthful, especially the VMX bits which must differentiate > > > between enabling VMX inside and outside SMX (TXT) operation. Rename the > > > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > > > little friendlier on the eyes. Keep the full name for the MSR itself to > > > help even the most obtuse reader decipher the abbreviation, and to match > > > the name used by the Intel SDM. > > > > If you anyway shorten the prefix, why not then go directly to FT_CTL? > > It is as obvious as FEAT_CTL is. Given the exhausting long variable > > names like FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX this would be worth of > > considering. > > If we're going to rename the function and file, I think we should stick > with the slightly longer FEAT_CTL. FT_CTL for the bits is ok since there > is more context to work with, but init_ft_ctl_msr() looks weird to me. OK. /Jarkko
On Fri, Nov 29, 2019 at 11:06:12PM +0200, Jarkko Sakkinen wrote: > On Thu, Nov 21, 2019 at 02:14:08PM -0800, Sean Christopherson wrote: > > On Thu, Nov 21, 2019 at 11:46:14AM +0200, Jarkko Sakkinen wrote: > > > On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > > > > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > > > > are quite a mouthful, especially the VMX bits which must differentiate > > > > between enabling VMX inside and outside SMX (TXT) operation. Rename the > > > > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > > > > little friendlier on the eyes. Keep the full name for the MSR itself to > > > > help even the most obtuse reader decipher the abbreviation, and to match > > > > the name used by the Intel SDM. > > > > > > If you anyway shorten the prefix, why not then go directly to FT_CTL? > > > It is as obvious as FEAT_CTL is. Given the exhausting long variable > > > names like FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX this would be worth of > > > considering. > > > > If we're going to rename the function and file, I think we should stick > > with the slightly longer FEAT_CTL. FT_CTL for the bits is ok since there > > is more context to work with, but init_ft_ctl_msr() looks weird to me. > > OK. I mean Acked-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> /Jarkko
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 6a3124664289..4c80d530f751 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -556,7 +556,13 @@ #define MSR_IA32_EBL_CR_POWERON 0x0000002a #define MSR_EBC_FREQUENCY_ID 0x0000002c #define MSR_SMI_COUNT 0x00000034 + #define MSR_IA32_FEATURE_CONTROL 0x0000003a +#define FEAT_CTL_LOCKED BIT(0) +#define FEAT_CTL_VMX_ENABLED_INSIDE_SMX BIT(1) +#define FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX BIT(2) +#define FEAT_CTL_LMCE_ENABLED BIT(20) + #define MSR_IA32_TSC_ADJUST 0x0000003b #define MSR_IA32_BNDCFGS 0x00000d90 @@ -564,11 +570,6 @@ #define MSR_IA32_XSS 0x00000da0 -#define FEATURE_CONTROL_LOCKED (1<<0) -#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) -#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) -#define FEATURE_CONTROL_LMCE (1<<20) - #define MSR_IA32_APICBASE 0x0000001b #define MSR_IA32_APICBASE_BSP (1<<8) #define MSR_IA32_APICBASE_ENABLE (1<<11) diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c index e270d0770134..3e5b29acd301 100644 --- a/arch/x86/kernel/cpu/mce/intel.c +++ b/arch/x86/kernel/cpu/mce/intel.c @@ -119,8 +119,8 @@ static bool lmce_supported(void) * generate a #GP fault. */ rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp); - if ((tmp & (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE)) == - (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE)) + if ((tmp & (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED)) == + (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED)) return true; return false; diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index 0e7c9301fe86..5737a94a4305 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -4434,8 +4434,8 @@ static int handle_vmon(struct kvm_vcpu *vcpu) gpa_t vmptr; uint32_t revision; struct vcpu_vmx *vmx = to_vmx(vcpu); - const u64 VMXON_NEEDED_FEATURES = FEATURE_CONTROL_LOCKED - | FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; + const u64 VMXON_NEEDED_FEATURES = FEAT_CTL_LOCKED + | FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX; /* * The Intel VMX Instruction Reference lists a bunch of bits that are diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index b83ff2030adc..a8e2c3b74daa 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1806,7 +1806,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_MCG_EXT_CTL: if (!msr_info->host_initiated && !(vmx->msr_ia32_feature_control & - FEATURE_CONTROL_LMCE)) + FEAT_CTL_LMCE_ENABLED)) return 1; msr_info->data = vcpu->arch.mcg_ext_ctl; break; @@ -2041,7 +2041,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_MCG_EXT_CTL: if ((!msr_info->host_initiated && !(to_vmx(vcpu)->msr_ia32_feature_control & - FEATURE_CONTROL_LMCE)) || + FEAT_CTL_LMCE_ENABLED)) || (data & ~MCG_EXT_CTL_LMCE_EN)) return 1; vcpu->arch.mcg_ext_ctl = data; @@ -2049,7 +2049,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_IA32_FEATURE_CONTROL: if (!vmx_feature_control_msr_valid(vcpu, data) || (to_vmx(vcpu)->msr_ia32_feature_control & - FEATURE_CONTROL_LOCKED && !msr_info->host_initiated)) + FEAT_CTL_LOCKED && !msr_info->host_initiated)) return 1; vmx->msr_ia32_feature_control = data; if (msr_info->host_initiated && data == 0) @@ -2195,21 +2195,21 @@ static __init int vmx_disabled_by_bios(void) u64 msr; rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); - if (msr & FEATURE_CONTROL_LOCKED) { + if (msr & FEAT_CTL_LOCKED) { /* launched w/ TXT and VMX disabled */ - if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX) + if (!(msr & FEAT_CTL_VMX_ENABLED_INSIDE_SMX) && tboot_enabled()) return 1; /* launched w/o TXT and VMX only enabled w/ TXT */ - if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX) - && (msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX) + if (!(msr & FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX) + && (msr & FEAT_CTL_VMX_ENABLED_INSIDE_SMX) && !tboot_enabled()) { printk(KERN_WARNING "kvm: disable TXT in the BIOS or " "activate TXT before enabling KVM\n"); return 1; } /* launched w/o TXT and VMX disabled */ - if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX) + if (!(msr & FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX) && !tboot_enabled()) return 1; } @@ -2259,10 +2259,10 @@ static int hardware_enable(void) rdmsrl(MSR_IA32_FEATURE_CONTROL, old); - test_bits = FEATURE_CONTROL_LOCKED; - test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; + test_bits = FEAT_CTL_LOCKED; + test_bits |= FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX; if (tboot_enabled()) - test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX; + test_bits |= FEAT_CTL_VMX_ENABLED_INSIDE_SMX; if ((old & test_bits) != test_bits) { /* enable and lock */ @@ -6793,7 +6793,7 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id) vmx->nested.posted_intr_nv = -1; vmx->nested.current_vmptr = -1ull; - vmx->msr_ia32_feature_control_valid_bits = FEATURE_CONTROL_LOCKED; + vmx->msr_ia32_feature_control_valid_bits = FEAT_CTL_LOCKED; /* * Enforce invariant: pi_desc.nv is always either POSTED_INTR_VECTOR @@ -7089,10 +7089,10 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu) if (nested_vmx_allowed(vcpu)) to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= - FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; + FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX; else to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= - ~FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; + ~FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX; if (nested_vmx_allowed(vcpu)) { nested_vmx_cr_fixed1_bits_update(vcpu); @@ -7502,10 +7502,10 @@ static void vmx_setup_mce(struct kvm_vcpu *vcpu) { if (vcpu->arch.mcg_cap & MCG_LMCE_P) to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= - FEATURE_CONTROL_LMCE; + FEAT_CTL_LMCE_ENABLED; else to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= - ~FEATURE_CONTROL_LMCE; + ~FEAT_CTL_LMCE_ENABLED; } static int vmx_smi_allowed(struct kvm_vcpu *vcpu) diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 5a0f34b1e226..2b138fe7951a 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -276,7 +276,7 @@ struct vcpu_vmx { /* * Only bits masked by msr_ia32_feature_control_valid_bits can be set in - * msr_ia32_feature_control. FEATURE_CONTROL_LOCKED is always included + * msr_ia32_feature_control. FEAT_CTL_LOCKED is always included * in msr_ia32_feature_control_valid_bits. */ u64 msr_ia32_feature_control;
As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL are quite a mouthful, especially the VMX bits which must differentiate between enabling VMX inside and outside SMX (TXT) operation. Rename the bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a little friendlier on the eyes. Keep the full name for the MSR itself to help even the most obtuse reader decipher the abbreviation, and to match the name used by the Intel SDM. Opportunistically fix a few other annoyances with the defines: - Relocate the bit defines so that they immediately follow the MSR define, e.g. aren't mistaken as belonging to MISC_FEATURE_CONTROL. - Add whitespace around the block of feature control defines to make it clear that FEAT_CTL is indeed short for FEATURE_CONTROL. - Use BIT() instead of manually encoding the bit shift. - Use "VMX" instead of "VMXON" to match the SDM. - Append "_ENABLED" to the LMCE bit to be consistent with the verbiage used for all other feature control bits. (LCME is an acronym for Local Machine Check Exception, i.e. LMCE_ENABLED is not redundant). Cc: Borislav Petkov <bp@alien8.de> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> --- arch/x86/include/asm/msr-index.h | 11 ++++++----- arch/x86/kernel/cpu/mce/intel.c | 4 ++-- arch/x86/kvm/vmx/nested.c | 4 ++-- arch/x86/kvm/vmx/vmx.c | 32 ++++++++++++++++---------------- arch/x86/kvm/vmx/vmx.h | 2 +- 5 files changed, 27 insertions(+), 26 deletions(-)