diff mbox

[V4] ARM: tegra: paz00: add clocks required for usb operation

Message ID 201108101921.58149.marc.dietrich@ap.physik.uni-giessen.de (mailing list archive)
State New, archived
Headers show

Commit Message

Marc Dietrich Aug. 10, 2011, 5:21 p.m. UTC
These clocks are required for usb operation. pll_p_out4 needs to be set
to 24 MHz. The other clocks default to "off" in order to save some energy.
    
Signed-off-by: Marc Dietrich <marvin24@gmx.de>

Comments

Stephen Warren Aug. 10, 2011, 8:39 p.m. UTC | #1
Marc Dietrich wrote at Wednesday, August 10, 2011 11:22 AM:
> These clocks are required for usb operation. pll_p_out4 needs to be set
> to 24 MHz. The other clocks default to "off" in order to save some energy.
> 
> Signed-off-by: Marc Dietrich <marvin24@gmx.de>

Acked-by: Stephen Warren <swarren@nvidia.com>

Given the rest of the thread, this is fine for now. We can address any
deficiencies in the bus clock and clk_m parenting when it's addressed
globally for all boards later.

> diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
> index 45111f6..cde36dc 100644
> --- a/arch/arm/mach-tegra/board-paz00.c
> +++ b/arch/arm/mach-tegra/board-paz00.c
> @@ -145,6 +145,12 @@ static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
>  	/* name		parent		rate		enabled */
>  	{ "uarta",	"pll_p",	216000000,	true },
>  	{ "uartd",	"pll_p",	216000000,	true },
> +
> +	{ "pll_p_out4",	"pll_p",	24000000,	true },
> +	{ "usbd",	"clk_m",	12000000,	false },
> +	{ "usb2",	"clk_m",	12000000,	false },
> +	{ "usb3",	"clk_m",	12000000,	false },
> +
>  	{ NULL,		NULL,		0,		0},
>  };
> 
> --
> 1.7.4.1
Olof Johansson Aug. 11, 2011, 12:49 p.m. UTC | #2
On Wed, Aug 10, 2011 at 01:39:58PM -0700, Stephen Warren wrote:
> Marc Dietrich wrote at Wednesday, August 10, 2011 11:22 AM:
> > These clocks are required for usb operation. pll_p_out4 needs to be set
> > to 24 MHz. The other clocks default to "off" in order to save some energy.
> > 
> > Signed-off-by: Marc Dietrich <marvin24@gmx.de>
> 
> Acked-by: Stephen Warren <swarren@nvidia.com>
> 
> Given the rest of the thread, this is fine for now. We can address any
> deficiencies in the bus clock and clk_m parenting when it's addressed
> globally for all boards later.

Agreed; I don't have good access to hardware while on vacation, so I won't
be able to test and post the clock change patches until towards the end of next
week.

I've applied and pushed this patch out to boards-for-3.2 meanwhile.


-Olof
diff mbox

Patch

diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 45111f6..cde36dc 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -145,6 +145,12 @@  static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
 	/* name		parent		rate		enabled */
 	{ "uarta",	"pll_p",	216000000,	true },
 	{ "uartd",	"pll_p",	216000000,	true },
+
+	{ "pll_p_out4",	"pll_p",	24000000,	true },
+	{ "usbd",	"clk_m",	12000000,	false },
+	{ "usb2",	"clk_m",	12000000,	false },
+	{ "usb3",	"clk_m",	12000000,	false },
+
 	{ NULL,		NULL,		0,		0},
 };