| Message ID | 20191119231912.12768-3-mike.leach@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | CoreSight CTI Driver | expand |
On Tue, Nov 19, 2019 at 11:19:00PM +0000, Mike Leach wrote: > Adds sysfs access to the coresight management registers. > > Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Mike Leach <mike.leach@linaro.org> Tags added to a patch are like a chain of custody and should be added in order they were published. In this case you wrote the patch so your SoB goes first. Then Suzuki and I have reviewed your patch and as such, our RB come _after_ your SoB. When I add the patch to my tree I'll add my SoB after that and when Greg picks it up in his, he will do the same. Please re-order the tags in this patch and the other ones in this set to reflect the chronology of events. > --- > .../hwtracing/coresight/coresight-cti-sysfs.c | 53 +++++++++++++++++++ > drivers/hwtracing/coresight/coresight-priv.h | 1 + > 2 files changed, 54 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c > index a832b8c6b866..507f8eb487fe 100644 > --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c > +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c > @@ -62,11 +62,64 @@ static struct attribute *coresight_cti_attrs[] = { > NULL, > }; > > +/* register based attributes */ > + > +/* macro to access RO registers with power check only (no enable check). */ > +#define coresight_cti_reg(name, offset) \ > +static ssize_t name##_show(struct device *dev, \ > + struct device_attribute *attr, char *buf) \ > +{ \ > + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ > + u32 val = 0; \ > + pm_runtime_get_sync(dev->parent); \ > + spin_lock(&drvdata->spinlock); \ > + if (drvdata->config.hw_powered) \ > + val = readl_relaxed(drvdata->base + offset); \ > + spin_unlock(&drvdata->spinlock); \ > + pm_runtime_put_sync(dev->parent); \ > + return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \ > +} \ > +static DEVICE_ATTR_RO(name) > + > +/* coresight management registers */ > +coresight_cti_reg(devaff0, CTIDEVAFF0); > +coresight_cti_reg(devaff1, CTIDEVAFF1); > +coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS); > +coresight_cti_reg(devarch, CORESIGHT_DEVARCH); > +coresight_cti_reg(devid, CORESIGHT_DEVID); > +coresight_cti_reg(devtype, CORESIGHT_DEVTYPE); > +coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0); > +coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1); > +coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2); > +coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3); > +coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4); > + > +static struct attribute *coresight_cti_mgmt_attrs[] = { > + &dev_attr_devaff0.attr, > + &dev_attr_devaff1.attr, > + &dev_attr_authstatus.attr, > + &dev_attr_devarch.attr, > + &dev_attr_devid.attr, > + &dev_attr_devtype.attr, > + &dev_attr_pidr0.attr, > + &dev_attr_pidr1.attr, > + &dev_attr_pidr2.attr, > + &dev_attr_pidr3.attr, > + &dev_attr_pidr4.attr, > + NULL, > +}; > + > static const struct attribute_group coresight_cti_group = { > .attrs = coresight_cti_attrs, > }; > > +static const struct attribute_group coresight_cti_mgmt_group = { > + .attrs = coresight_cti_mgmt_attrs, > + .name = "mgmt", > +}; > + > const struct attribute_group *coresight_cti_groups[] = { > &coresight_cti_group, > + &coresight_cti_mgmt_group, > NULL, > }; > diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h > index 82e563cdc879..aba6b789c969 100644 > --- a/drivers/hwtracing/coresight/coresight-priv.h > +++ b/drivers/hwtracing/coresight/coresight-priv.h > @@ -22,6 +22,7 @@ > #define CORESIGHT_CLAIMCLR 0xfa4 > #define CORESIGHT_LAR 0xfb0 > #define CORESIGHT_LSR 0xfb4 > +#define CORESIGHT_DEVARCH 0xfbc > #define CORESIGHT_AUTHSTATUS 0xfb8 > #define CORESIGHT_DEVID 0xfc8 > #define CORESIGHT_DEVTYPE 0xfcc > -- > 2.17.1 >
diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index a832b8c6b866..507f8eb487fe 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -62,11 +62,64 @@ static struct attribute *coresight_cti_attrs[] = { NULL, }; +/* register based attributes */ + +/* macro to access RO registers with power check only (no enable check). */ +#define coresight_cti_reg(name, offset) \ +static ssize_t name##_show(struct device *dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ + u32 val = 0; \ + pm_runtime_get_sync(dev->parent); \ + spin_lock(&drvdata->spinlock); \ + if (drvdata->config.hw_powered) \ + val = readl_relaxed(drvdata->base + offset); \ + spin_unlock(&drvdata->spinlock); \ + pm_runtime_put_sync(dev->parent); \ + return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \ +} \ +static DEVICE_ATTR_RO(name) + +/* coresight management registers */ +coresight_cti_reg(devaff0, CTIDEVAFF0); +coresight_cti_reg(devaff1, CTIDEVAFF1); +coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS); +coresight_cti_reg(devarch, CORESIGHT_DEVARCH); +coresight_cti_reg(devid, CORESIGHT_DEVID); +coresight_cti_reg(devtype, CORESIGHT_DEVTYPE); +coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0); +coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1); +coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2); +coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3); +coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4); + +static struct attribute *coresight_cti_mgmt_attrs[] = { + &dev_attr_devaff0.attr, + &dev_attr_devaff1.attr, + &dev_attr_authstatus.attr, + &dev_attr_devarch.attr, + &dev_attr_devid.attr, + &dev_attr_devtype.attr, + &dev_attr_pidr0.attr, + &dev_attr_pidr1.attr, + &dev_attr_pidr2.attr, + &dev_attr_pidr3.attr, + &dev_attr_pidr4.attr, + NULL, +}; + static const struct attribute_group coresight_cti_group = { .attrs = coresight_cti_attrs, }; +static const struct attribute_group coresight_cti_mgmt_group = { + .attrs = coresight_cti_mgmt_attrs, + .name = "mgmt", +}; + const struct attribute_group *coresight_cti_groups[] = { &coresight_cti_group, + &coresight_cti_mgmt_group, NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 82e563cdc879..aba6b789c969 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -22,6 +22,7 @@ #define CORESIGHT_CLAIMCLR 0xfa4 #define CORESIGHT_LAR 0xfb0 #define CORESIGHT_LSR 0xfb4 +#define CORESIGHT_DEVARCH 0xfbc #define CORESIGHT_AUTHSTATUS 0xfb8 #define CORESIGHT_DEVID 0xfc8 #define CORESIGHT_DEVTYPE 0xfcc