| Message ID | 20191121000843.24844-1-beata.michalska@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/arm: Support for Data Cache Clean up to PoP | expand |
On Thu, 21 Nov 2019 at 00:09, Beata Michalska <beata.michalska@linaro.org> wrote: > > ARMv8.2 introduced support for Data Cache Clean instructions to PoP > (point-of-persistence) and PoDP (point-of-deep-persistence): > ARMv8.2-DCCVAP & ARMv8.2-DCCVADP respectively. > This patch set adds support for emulating both, though there is no > distinction between the two points: the PoDP is assumed to represent > the same point of persistence as PoP. Case there is no such point specified > for the considered memory system both will fall back to the DV CVAC inst > (clean up to the point of coherency). > The changes introduced include adding probe_read for validating read memory > access to allow verification for mandatory read access for both cache > clean instructions, along with support for writeback for requested memory > regions through msync, if one is available, based otherwise on fsyncdata. Applied to target-arm.next for 5.0, thanks. -- PMM
ARMv8.2 introduced support for Data Cache Clean instructions to PoP (point-of-persistence) and PoDP (point-of-deep-persistence): ARMv8.2-DCCVAP & ARMv8.2-DCCVADP respectively. This patch set adds support for emulating both, though there is no distinction between the two points: the PoDP is assumed to represent the same point of persistence as PoP. Case there is no such point specified for the considered memory system both will fall back to the DV CVAC inst (clean up to the point of coherency). The changes introduced include adding probe_read for validating read memory access to allow verification for mandatory read access for both cache clean instructions, along with support for writeback for requested memory regions through msync, if one is available, based otherwise on fsyncdata. As currently the virt platform is missing support for NVDIMM, the changes have been tested with [1] & [2] [1] https://patchwork.kernel.org/cover/10830237/ [2] https://patchwork.kernel.org/project/qemu-devel/list/?series=159441 v3: - Assert on invalid sync range for ram block - Drop alignment handling from qemu_msync v2: - Moved the msync into a qemu wrapper with CONFIG_POSIX switch + additional comments - Fixed length alignment - Dropped treating the DC CVAP/CVADP as special case and moved those to conditional registration - Dropped needless locking for grabbing mem region Beata Michalska (4): tcg: cputlb: Add probe_read Memory: Enable writeback for given memory region migration: ram: Switch to ram block writeback target/arm: Add support for DC CVAP & DC CVADP ins exec.c | 36 +++++++++++++++++++++++++++++++ include/exec/exec-all.h | 6 ++++++ include/exec/memory.h | 6 ++++++ include/exec/ram_addr.h | 8 +++++++ include/qemu/cutils.h | 1 + linux-user/elfload.c | 2 ++ memory.c | 12 +++++++++++ migration/ram.c | 5 +---- target/arm/cpu.h | 10 +++++++++ target/arm/cpu64.c | 1 + target/arm/helper.c | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ util/cutils.c | 38 +++++++++++++++++++++++++++++++++ 12 files changed, 177 insertions(+), 4 deletions(-)