Message ID | 20191126002635.5779-4-radhakrishna.sripada@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Clear Color Support for TGL Render Decompression | expand |
On Mon, Nov 25, 2019 at 04:26:31PM -0800, Radhakrishna Sripada wrote: > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > > Easier to read if all the alignment changes are in one place and contained > within a function. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++---------- > 1 file changed, 16 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 2a4593afbe86..85f009500344 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2611,7 +2611,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane) > else > return 64; > } else { > - return intel_tile_width_bytes(fb, color_plane); > + u32 tile_width = intel_tile_width_bytes(fb, color_plane); > + > + /* > + * Display WA #0531: skl,bxt,kbl,glk > + * > + * Render decompression and plane width > 3840 > + * combined with horizontal panning requires the > + * plane stride to be a multiple of 4. We'll just > + * require the entire fb to accommodate that to avoid > + * potential runtime errors at plane configuration time. > + */ > + if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) && > + color_plane == 0 && fb->width > 3840) > + tile_width *= 4; > + > + return tile_width; > } > } > > @@ -16463,20 +16478,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, > } > > stride_alignment = intel_fb_stride_alignment(fb, i); > - > - /* > - * Display WA #0531: skl,bxt,kbl,glk > - * > - * Render decompression and plane width > 3840 > - * combined with horizontal panning requires the > - * plane stride to be a multiple of 4. We'll just > - * require the entire fb to accommodate that to avoid > - * potential runtime errors at plane configuration time. > - */ > - if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 && > - is_ccs_modifier(fb->modifier)) > - stride_alignment *= 4; > - > if (fb->pitches[i] & (stride_alignment - 1)) { > DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n", > i, fb->pitches[i], stride_alignment); > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 2a4593afbe86..85f009500344 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2611,7 +2611,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane) else return 64; } else { - return intel_tile_width_bytes(fb, color_plane); + u32 tile_width = intel_tile_width_bytes(fb, color_plane); + + /* + * Display WA #0531: skl,bxt,kbl,glk + * + * Render decompression and plane width > 3840 + * combined with horizontal panning requires the + * plane stride to be a multiple of 4. We'll just + * require the entire fb to accommodate that to avoid + * potential runtime errors at plane configuration time. + */ + if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) && + color_plane == 0 && fb->width > 3840) + tile_width *= 4; + + return tile_width; } } @@ -16463,20 +16478,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, } stride_alignment = intel_fb_stride_alignment(fb, i); - - /* - * Display WA #0531: skl,bxt,kbl,glk - * - * Render decompression and plane width > 3840 - * combined with horizontal panning requires the - * plane stride to be a multiple of 4. We'll just - * require the entire fb to accommodate that to avoid - * potential runtime errors at plane configuration time. - */ - if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 && - is_ccs_modifier(fb->modifier)) - stride_alignment *= 4; - if (fb->pitches[i] & (stride_alignment - 1)) { DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n", i, fb->pitches[i], stride_alignment);