| Message ID | 20191212190230.188505-4-sean@poorly.run (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Add support for HDCP 1.4 over MST connectors | expand |
On 2019-12-12 at 14:02:21 -0500, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > HDCP signalling should not be left on, WARN if it is LGTM Reviewed-by: Ramalingam C <ramalingam.c@intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Signed-off-by: Sean Paul <seanpaul@chromium.org> > > Changes in v2: > - Added to the set in lieu of just clearing the bit > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 5b6f32517c75..4a5bdf3ef51d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -1951,6 +1951,8 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state > i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); > u32 val = I915_READ(reg); > > + WARN_ON(val & TRANS_DDI_HDCP_SIGNALLING); > + > if (INTEL_GEN(dev_priv) >= 12) { > val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK | > TRANS_DDI_DP_VC_PAYLOAD_ALLOC); > -- > Sean Paul, Software Engineer, Google / Chromium OS >
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 5b6f32517c75..4a5bdf3ef51d 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1951,6 +1951,8 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); u32 val = I915_READ(reg); + WARN_ON(val & TRANS_DDI_HDCP_SIGNALLING); + if (INTEL_GEN(dev_priv) >= 12) { val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);