Message ID | 20191211194624.2872-5-jae.hyun.yoo@linux.intel.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | PECI device driver introduction | expand |
On Wed, Dec 11, 2019 at 11:46:14AM -0800, Jae Hyun Yoo wrote: > This commit adds bindings document of Aspeed PECI adapter for ASPEED > AST24xx/25xx/26xx SoCs. > > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Joel Stanley <joel@jms.id.au> > Cc: Andrew Jeffery <andrew@aj.id.au> > Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Jason M Biils <jason.m.bills@linux.intel.com> > Cc: Milton Miller II <miltonm@us.ibm.com> > Cc: Pavel Machek <pavel@ucw.cz> > Cc: Robin Murphy <robin.murphy@arm.com> > Cc: Ryan Chen <ryan_chen@aspeedtech.com> > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > --- > Changes since v10: > - Changed documents format to DT schema format so I dropped all review tags. > Please review it again. > > .../devicetree/bindings/peci/peci-aspeed.yaml | 124 ++++++++++++++++++ > 1 file changed, 124 insertions(+) > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.yaml > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml > new file mode 100644 > index 000000000000..0f5c2993fe9b > --- /dev/null > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml > @@ -0,0 +1,124 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Aspeed PECI Bus Device Tree Bindings > + > +maintainers: > + - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > + > +properties: > + compatible: > + enum: > + - aspeed,ast2400-peci > + - aspeed,ast2500-peci > + - aspeed,ast2600-peci > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + # Required to define a client address. > + const: 1 > + > + "#size-cells": > + # Required to define a client address. > + const: 0 These 2 can be defined by the bus schema. > + > + interrupts: > + maxItems: 1 > + > + clocks: > + description: | You can drop the '|' if there's no formatting to preserve. > + Clock source for PECI controller. Should reference the external > + oscillator clock. > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + clock-frequency: > + # Operation frequency of PECI controller in units of Hz. > + minimum: 187500 > + maximum: 24000000 > + > + msg-timing: > + description: | > + Message timing negotiation period. This value will determine the period > + of message timing negotiation to be issued by PECI controller. The unit > + of the programmed value is four times of PECI clock period. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 255 > + default: 1 > + > + addr-timing: > + description: | > + Address timing negotiation period. This value will determine the period > + of address timing negotiation to be issued by PECI controller. The unit > + of the programmed value is four times of PECI clock period. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 255 > + default: 1 > + > + rd-sampling-point: > + description: | > + Read sampling point selection. The whole period of a bit time will be > + divided into 16 time frames. This value will determine the time frame > + in which the controller will sample PECI signal for data read back. > + Usually in the middle of a bit time is the best. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 15 > + default: 8 > + > + cmd-timeout-ms: > + # Command timeout in units of ms. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 1 > + maximum: 60000 > + default: 1000 > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - interrupts > + - clocks > + - resets > + - clock-frequency > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/ast2600-clock.h> > + peci: bus@1e78b000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1e78b000 0x60>; You can drop this node in the examples. > + > + peci0: peci-bus@0 { > + compatible = "aspeed,ast2600-peci"; > + reg = <0x0 0x100>; > + #address-cells = <1>; > + #size-cells = <0>; > + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; > + resets = <&syscon ASPEED_RESET_PECI>; > + clock-frequency = <24000000>; > + msg-timing = <1>; > + addr-timing = <1>; > + rd-sampling-point = <8>; > + cmd-timeout-ms = <1000>; > + }; > + }; > +... > -- > 2.17.1 >
Hi Rob, On 12/17/2019 6:57 PM, Rob Herring wrote: > On Wed, Dec 11, 2019 at 11:46:14AM -0800, Jae Hyun Yoo wrote: >> This commit adds bindings document of Aspeed PECI adapter for ASPEED >> AST24xx/25xx/26xx SoCs. >> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Cc: Joel Stanley <joel@jms.id.au> >> Cc: Andrew Jeffery <andrew@aj.id.au> >> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> >> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> >> Cc: Jason M Biils <jason.m.bills@linux.intel.com> >> Cc: Milton Miller II <miltonm@us.ibm.com> >> Cc: Pavel Machek <pavel@ucw.cz> >> Cc: Robin Murphy <robin.murphy@arm.com> >> Cc: Ryan Chen <ryan_chen@aspeedtech.com> >> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> >> --- >> Changes since v10: >> - Changed documents format to DT schema format so I dropped all review tags. >> Please review it again. >> >> .../devicetree/bindings/peci/peci-aspeed.yaml | 124 ++++++++++++++++++ >> 1 file changed, 124 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.yaml >> >> diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml >> new file mode 100644 >> index 000000000000..0f5c2993fe9b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml >> @@ -0,0 +1,124 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Aspeed PECI Bus Device Tree Bindings >> + >> +maintainers: >> + - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> >> + >> +properties: >> + compatible: >> + enum: >> + - aspeed,ast2400-peci >> + - aspeed,ast2500-peci >> + - aspeed,ast2600-peci >> + >> + reg: >> + maxItems: 1 >> + > >> + "#address-cells": >> + # Required to define a client address. >> + const: 1 >> + >> + "#size-cells": >> + # Required to define a client address. >> + const: 0 > > These 2 can be defined by the bus schema. I see. I'll add these to peci-bus schema. >> + >> + interrupts: >> + maxItems: 1 >> + >> + clocks: >> + description: | > > You can drop the '|' if there's no formatting to preserve. Will check this for all bindings in this patch set. >> + Clock source for PECI controller. Should reference the external >> + oscillator clock. >> + maxItems: 1 >> + >> + resets: >> + maxItems: 1 >> + >> + clock-frequency: >> + # Operation frequency of PECI controller in units of Hz. >> + minimum: 187500 >> + maximum: 24000000 >> + >> + msg-timing: >> + description: | >> + Message timing negotiation period. This value will determine the period >> + of message timing negotiation to be issued by PECI controller. The unit >> + of the programmed value is four times of PECI clock period. >> + allOf: >> + - $ref: /schemas/types.yaml#/definitions/uint32 >> + - minimum: 0 >> + maximum: 255 >> + default: 1 >> + >> + addr-timing: >> + description: | >> + Address timing negotiation period. This value will determine the period >> + of address timing negotiation to be issued by PECI controller. The unit >> + of the programmed value is four times of PECI clock period. >> + allOf: >> + - $ref: /schemas/types.yaml#/definitions/uint32 >> + - minimum: 0 >> + maximum: 255 >> + default: 1 >> + >> + rd-sampling-point: >> + description: | >> + Read sampling point selection. The whole period of a bit time will be >> + divided into 16 time frames. This value will determine the time frame >> + in which the controller will sample PECI signal for data read back. >> + Usually in the middle of a bit time is the best. >> + allOf: >> + - $ref: /schemas/types.yaml#/definitions/uint32 >> + - minimum: 0 >> + maximum: 15 >> + default: 8 >> + >> + cmd-timeout-ms: >> + # Command timeout in units of ms. >> + allOf: >> + - $ref: /schemas/types.yaml#/definitions/uint32 >> + - minimum: 1 >> + maximum: 60000 >> + default: 1000 >> + >> +required: >> + - compatible >> + - reg >> + - "#address-cells" >> + - "#size-cells" >> + - interrupts >> + - clocks >> + - resets >> + - clock-frequency >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/clock/ast2600-clock.h> >> + peci: bus@1e78b000 { >> + compatible = "simple-bus"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0x0 0x1e78b000 0x60>; > > You can drop this node in the examples. I see. Will drop the parent node in this example. Thanks a lot for your review! -Jae >> + >> + peci0: peci-bus@0 { >> + compatible = "aspeed,ast2600-peci"; >> + reg = <0x0 0x100>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; >> + resets = <&syscon ASPEED_RESET_PECI>; >> + clock-frequency = <24000000>; >> + msg-timing = <1>; >> + addr-timing = <1>; >> + rd-sampling-point = <8>; >> + cmd-timeout-ms = <1000>; >> + }; >> + }; >> +... >> -- >> 2.17.1 >> >
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml new file mode 100644 index 000000000000..0f5c2993fe9b --- /dev/null +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed PECI Bus Device Tree Bindings + +maintainers: + - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +properties: + compatible: + enum: + - aspeed,ast2400-peci + - aspeed,ast2500-peci + - aspeed,ast2600-peci + + reg: + maxItems: 1 + + "#address-cells": + # Required to define a client address. + const: 1 + + "#size-cells": + # Required to define a client address. + const: 0 + + interrupts: + maxItems: 1 + + clocks: + description: | + Clock source for PECI controller. Should reference the external + oscillator clock. + maxItems: 1 + + resets: + maxItems: 1 + + clock-frequency: + # Operation frequency of PECI controller in units of Hz. + minimum: 187500 + maximum: 24000000 + + msg-timing: + description: | + Message timing negotiation period. This value will determine the period + of message timing negotiation to be issued by PECI controller. The unit + of the programmed value is four times of PECI clock period. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 255 + default: 1 + + addr-timing: + description: | + Address timing negotiation period. This value will determine the period + of address timing negotiation to be issued by PECI controller. The unit + of the programmed value is four times of PECI clock period. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 255 + default: 1 + + rd-sampling-point: + description: | + Read sampling point selection. The whole period of a bit time will be + divided into 16 time frames. This value will determine the time frame + in which the controller will sample PECI signal for data read back. + Usually in the middle of a bit time is the best. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 15 + default: 8 + + cmd-timeout-ms: + # Command timeout in units of ms. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 1 + maximum: 60000 + default: 1000 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - interrupts + - clocks + - resets + - clock-frequency + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/ast2600-clock.h> + peci: bus@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + + peci0: peci-bus@0 { + compatible = "aspeed,ast2600-peci"; + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; + resets = <&syscon ASPEED_RESET_PECI>; + clock-frequency = <24000000>; + msg-timing = <1>; + addr-timing = <1>; + rd-sampling-point = <8>; + cmd-timeout-ms = <1000>; + }; + }; +...
This commit adds bindings document of Aspeed PECI adapter for ASPEED AST24xx/25xx/26xx SoCs. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Joel Stanley <joel@jms.id.au> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jason M Biils <jason.m.bills@linux.intel.com> Cc: Milton Miller II <miltonm@us.ibm.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> --- Changes since v10: - Changed documents format to DT schema format so I dropped all review tags. Please review it again. .../devicetree/bindings/peci/peci-aspeed.yaml | 124 ++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.yaml