| Message ID | 8aec8994bbe1186d257b0a712e13cf914c5ebe35.1576462051.git-series.andrew@aj.id.au (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 782da920e3c328bc753d4bc433bf71a49d7b272d |
| Headers | show |
| Series | ipmi: kcs-bmc: Rework bindings to clean up DT warnings | expand |
On Mon, 16 Dec 2019 12:57:40 +1030, Andrew Jeffery wrote: > The v2 binding utilises reg and renames some of the v1 properties. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > --- > v2: Rename slave-reg to aspeed,lpc-io-reg > > Rob: After our discussion about the name of 'slave-reg' on v1 I've thought > about it some more and have landed on aspeed,lpc-io-reg. In v1 I argued that > the name should be generic and you suggested that if so it should go in a > generic binding document - I've thought about this some more and concluded that > it was hard to pin down exactly where it should be documented if it were > generic (the generic ASPEED LPC binding is one place, but that would suggest > that the property is still ASPEED-specific; maybe some discussion with > Nuvoton might give some insight). > > Regardless, it turns out that the address specification is really > ASPEED-specific in this case: The KCS host interface in the LPC IO space > consists of a data and status register, but the slave controller infers the > address of the second from the address of the first and thus only the address > of the first can be programmed on the BMC-side. ASPEED supply documentation > that maps the LPC-side register layout for given LPC IO base addresses. I think > this is esoteric enough to warrant the aspeed prefix. > > Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt | 20 +++++--- > 1 file changed, 14 insertions(+), 6 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt index d98a9bf45d6c..193e71ca96b0 100644 --- a/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt +++ b/Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt @@ -1,9 +1,10 @@ -* Aspeed KCS (Keyboard Controller Style) IPMI interface +# Aspeed KCS (Keyboard Controller Style) IPMI interface The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs (Baseboard Management Controllers) and the KCS interface can be used to perform in-band IPMI communication with their host. +## v1 Required properties: - compatible : should be one of "aspeed,ast2400-kcs-bmc" @@ -12,14 +13,21 @@ Required properties: - kcs_chan : The LPC channel number in the controller - kcs_addr : The host CPU IO map address +## v2 +Required properties: +- compatible : should be one of + "aspeed,ast2400-kcs-bmc-v2" + "aspeed,ast2500-kcs-bmc-v2" +- reg : The address and size of the IDR, ODR and STR registers +- interrupts : interrupt generated by the controller +- aspeed,lpc-io-reg : The host CPU LPC IO address for the device Example: - kcs3: kcs3@0 { - compatible = "aspeed,ast2500-kcs-bmc"; - reg = <0x0 0x80>; + kcs3: kcs@24 { + compatible = "aspeed,ast2500-kcs-bmc-v2"; + reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; + aspeed,lpc-reg = <0xca2>; interrupts = <8>; - kcs_chan = <3>; - kcs_addr = <0xCA2>; status = "okay"; };
The v2 binding utilises reg and renames some of the v1 properties. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- v2: Rename slave-reg to aspeed,lpc-io-reg Rob: After our discussion about the name of 'slave-reg' on v1 I've thought about it some more and have landed on aspeed,lpc-io-reg. In v1 I argued that the name should be generic and you suggested that if so it should go in a generic binding document - I've thought about this some more and concluded that it was hard to pin down exactly where it should be documented if it were generic (the generic ASPEED LPC binding is one place, but that would suggest that the property is still ASPEED-specific; maybe some discussion with Nuvoton might give some insight). Regardless, it turns out that the address specification is really ASPEED-specific in this case: The KCS host interface in the LPC IO space consists of a data and status register, but the slave controller infers the address of the second from the address of the first and thus only the address of the first can be programmed on the BMC-side. ASPEED supply documentation that maps the LPC-side register layout for given LPC IO base addresses. I think this is esoteric enough to warrant the aspeed prefix. Documentation/devicetree/bindings/ipmi/aspeed-kcs-bmc.txt | 20 +++++--- 1 file changed, 14 insertions(+), 6 deletions(-)