Message ID | 1576827431-31942-2-git-send-email-qiangqing.zhang@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | irqchip: add NXP INTMUX interrupt controller | expand |
> -----Original Message----- > From: Joakim Zhang <qiangqing.zhang@nxp.com> > Sent: 2019年12月20日 15:37 > To: maz@kernel.org; tglx@linutronix.de; jason@lakedaemon.net; > robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; > s.hauer@pengutronix.de > Cc: kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>; > linux-kernel@vger.kernel.org; Andy Duan <fugang.duan@nxp.com>; > linux-arm-kernel@lists.infradead.org; Joakim Zhang > <qiangqing.zhang@nxp.com> > Subject: [PATCH V3 1/2] dt-bindings/irq: add binding for NXP INTMUX interrupt > multiplexer > > This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer for > i.MX8 family SoCs. > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> > --- > .../interrupt-controller/fsl,intmux.txt | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > > diff --git > a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > new file mode 100644 > index 000000000000..3ebe9cac5f20 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux. > +++ txt > @@ -0,0 +1,36 @@ > +Freescale INTMUX interrupt multiplexer > + > +Required properties: > + > +- compatible: Should be: > + - "fsl,imx-intmux" > +- reg: Physical base address and size of registers. > +- interrupts: Should contain the parent interrupt lines (up to 8) used > +to > + multiplex the input interrupts. > +- clocks: Should contain one clock for entry in clock-names. > +- clock-names: > + - "ipg": main logic clock > +- interrupt-controller: Identifies the node as an interrupt controller. > +- #interrupt-cells: Specifies the number of cells needed to encode an > + interrupt source. The value must be 2. > + - the 1st cell: hardware interrupt number > + - the 2nd cell: channel index, value must smaller than channels used > + > +Optional properties: > + > +- fsl,intmux_chans: The number of channels used for interrupt source. > +The > + Maximum value is 8. If this property is not set in DT then driver > +uses > + 1 channel by default. > + > +Example: > + > + intmux@37400000 { > + compatible = "fsl,imx-intmux"; > + reg = <0x37400000 0x1000>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8QM_CM40_IPG_CLK>; > + clock-names = "ipg"; > + interrupt-controller; > + #interrupt-cells = <1>; Hi Marc, I am so sorry, this should be #interrupt-cells = <2>, will correct it in next version. Best Regards, Joakim Zhang > + }; > + > -- > 2.17.1
On 20/12/19 1:07 PM, Joakim Zhang wrote: > This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer > for i.MX8 family SoCs. > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> > --- > .../interrupt-controller/fsl,intmux.txt | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > new file mode 100644 > index 000000000000..3ebe9cac5f20 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > @@ -0,0 +1,36 @@ > +Freescale INTMUX interrupt multiplexer > + > +Required properties: > + > +- compatible: Should be: > + - "fsl,imx-intmux" > +- reg: Physical base address and size of registers. > +- interrupts: Should contain the parent interrupt lines (up to 8) used to > + multiplex the input interrupts. > +- clocks: Should contain one clock for entry in clock-names. > +- clock-names: > + - "ipg": main logic clock > +- interrupt-controller: Identifies the node as an interrupt controller. > +- #interrupt-cells: Specifies the number of cells needed to encode an > + interrupt source. The value must be 2. > + - the 1st cell: hardware interrupt number> + - the 2nd cell: channel index, value must smaller than channels used As per the xlate function, 1st cell is channel index and 2nd cell is hw interrupt number no? Thanks and regards, Lokesh > + > +Optional properties: > + > +- fsl,intmux_chans: The number of channels used for interrupt source. The > + Maximum value is 8. If this property is not set in DT then driver uses > + 1 channel by default. > + > +Example: > + > + intmux@37400000 { > + compatible = "fsl,imx-intmux"; > + reg = <0x37400000 0x1000>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8QM_CM40_IPG_CLK>; > + clock-names = "ipg"; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + >
On 20/12/19 5:10 PM, Lokesh Vutla wrote: > > > On 20/12/19 1:07 PM, Joakim Zhang wrote: >> This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer >> for i.MX8 family SoCs. >> >> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> >> --- >> .../interrupt-controller/fsl,intmux.txt | 36 +++++++++++++++++++ >> 1 file changed, 36 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt >> new file mode 100644 >> index 000000000000..3ebe9cac5f20 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt >> @@ -0,0 +1,36 @@ >> +Freescale INTMUX interrupt multiplexer >> + >> +Required properties: >> + >> +- compatible: Should be: >> + - "fsl,imx-intmux" >> +- reg: Physical base address and size of registers. >> +- interrupts: Should contain the parent interrupt lines (up to 8) used to >> + multiplex the input interrupts. >> +- clocks: Should contain one clock for entry in clock-names. >> +- clock-names: >> + - "ipg": main logic clock >> +- interrupt-controller: Identifies the node as an interrupt controller. >> +- #interrupt-cells: Specifies the number of cells needed to encode an >> + interrupt source. The value must be 2. >> + - the 1st cell: hardware interrupt number> + - the 2nd cell: channel index, value must smaller than channels used > > As per the xlate function, 1st cell is channel index and 2nd cell is hw > interrupt number no? Sorry my bad, I read it wrong. Ignore this comment. Thanks and regards, Lokesh > > Thanks and regards, > Lokesh > >> + >> +Optional properties: >> + >> +- fsl,intmux_chans: The number of channels used for interrupt source. The >> + Maximum value is 8. If this property is not set in DT then driver uses >> + 1 channel by default. >> + >> +Example: >> + >> + intmux@37400000 { >> + compatible = "fsl,imx-intmux"; >> + reg = <0x37400000 0x1000>; >> + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&clk IMX8QM_CM40_IPG_CLK>; >> + clock-names = "ipg"; >> + interrupt-controller; >> + #interrupt-cells = <1>; >> + }; >> + >> > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt new file mode 100644 index 000000000000..3ebe9cac5f20 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt @@ -0,0 +1,36 @@ +Freescale INTMUX interrupt multiplexer + +Required properties: + +- compatible: Should be: + - "fsl,imx-intmux" +- reg: Physical base address and size of registers. +- interrupts: Should contain the parent interrupt lines (up to 8) used to + multiplex the input interrupts. +- clocks: Should contain one clock for entry in clock-names. +- clock-names: + - "ipg": main logic clock +- interrupt-controller: Identifies the node as an interrupt controller. +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value must be 2. + - the 1st cell: hardware interrupt number + - the 2nd cell: channel index, value must smaller than channels used + +Optional properties: + +- fsl,intmux_chans: The number of channels used for interrupt source. The + Maximum value is 8. If this property is not set in DT then driver uses + 1 channel by default. + +Example: + + intmux@37400000 { + compatible = "fsl,imx-intmux"; + reg = <0x37400000 0x1000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8QM_CM40_IPG_CLK>; + clock-names = "ipg"; + interrupt-controller; + #interrupt-cells = <1>; + }; +
This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer for i.MX8 family SoCs. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> --- .../interrupt-controller/fsl,intmux.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt