| Message ID | 18a7fd3e75a172a7bca9feecfb8a77ecb802d8af.1576751325.git.baruch@tkos.co.il (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 62bba54d99407aedfe9b0a02e72e23c06e2b0116 |
| Headers | show |
| Series | arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node | expand |
On Thu, Dec 19, 2019 at 12:28:45PM +0200, Baruch Siach wrote: > Explicitly set the switch cpu (upstream) port phy-mode and managed > properties. This fixes the Marvell 88E6141 switch serdes configuration > with the recently enabled phylink layer. > > Fixes: a612083327 ("arm64: dts: add support for SolidRun Clearfog GT 8K") > Reported-by: Denis Odintsov <d.odintsov@traviangames.com> > Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
Hi Baruch, > Explicitly set the switch cpu (upstream) port phy-mode and managed > properties. This fixes the Marvell 88E6141 switch serdes configuration > with the recently enabled phylink layer. > > Fixes: a612083327 ("arm64: dts: add support for SolidRun Clearfog GT 8K") > Reported-by: Denis Odintsov <d.odintsov@traviangames.com> > Signed-off-by: Baruch Siach <baruch@tkos.co.il> Applied on mvebu/dt64 Thanks, Gregory > --- > arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > index bd881497b872..a211a046b2f2 100644 > --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > @@ -408,6 +408,8 @@ port@5 { > reg = <5>; > label = "cpu"; > ethernet = <&cp1_eth2>; > + phy-mode = "2500base-x"; > + managed = "in-band-status"; > }; > }; > > -- > 2.24.0 >
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index bd881497b872..a211a046b2f2 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -408,6 +408,8 @@ port@5 { reg = <5>; label = "cpu"; ethernet = <&cp1_eth2>; + phy-mode = "2500base-x"; + managed = "in-band-status"; }; };
Explicitly set the switch cpu (upstream) port phy-mode and managed properties. This fixes the Marvell 88E6141 switch serdes configuration with the recently enabled phylink layer. Fixes: a612083327 ("arm64: dts: add support for SolidRun Clearfog GT 8K") Reported-by: Denis Odintsov <d.odintsov@traviangames.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 ++ 1 file changed, 2 insertions(+)