diff mbox series

[v4] riscv: make sure the cores stay looping in .Lsecondary_park

Message ID 20200115065436.7702-1-greentime.hu@sifive.com (mailing list archive)
State New, archived
Headers show
Series [v4] riscv: make sure the cores stay looping in .Lsecondary_park | expand

Commit Message

Greentime Hu Jan. 15, 2020, 6:54 a.m. UTC 
The code in secondary_park is currently placed in the .init section. The
kernel reclaims and clears this code when it finishes booting. That
causes the cores parked in it to go to somewhere unpredictable, so we
move this function out of init to make sure the cores stay looping there.

The instruction bgeu a0, t0, .Lsecondary_park may have "a relocation
truncated to fit" issue during linking time. It is because that sections
are too far to jump. Let's use tail to jump to the .Lsecondary_park.

Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 arch/riscv/kernel/head.S | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

Comments

Paul Walmsley Jan. 16, 2020, 2:32 a.m. UTC | #1 
On Wed, 15 Jan 2020, Greentime Hu wrote:

> The code in secondary_park is currently placed in the .init section. The
> kernel reclaims and clears this code when it finishes booting. That
> causes the cores parked in it to go to somewhere unpredictable, so we
> move this function out of init to make sure the cores stay looping there.
> 
> The instruction bgeu a0, t0, .Lsecondary_park may have "a relocation
> truncated to fit" issue during linking time. It is because that sections
> are too far to jump. Let's use tail to jump to the .Lsecondary_park.
> 
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>

Thanks, queued for v5.5-rc.  Anup's Reviewed-by: has been dropped since 
the patch changed significantly - Anup, if you are still happy with it, 
please reply with another Reviewed-by:.  Thanks,


- Paul
Anup Patel Jan. 16, 2020, 4:28 a.m. UTC | #2 
On Thu, Jan 16, 2020 at 8:02 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> On Wed, 15 Jan 2020, Greentime Hu wrote:
>
> > The code in secondary_park is currently placed in the .init section. The
> > kernel reclaims and clears this code when it finishes booting. That
> > causes the cores parked in it to go to somewhere unpredictable, so we
> > move this function out of init to make sure the cores stay looping there.
> >
> > The instruction bgeu a0, t0, .Lsecondary_park may have "a relocation
> > truncated to fit" issue during linking time. It is because that sections
> > are too far to jump. Let's use tail to jump to the .Lsecondary_park.
> >
> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
>
> Thanks, queued for v5.5-rc.  Anup's Reviewed-by: has been dropped since
> the patch changed significantly - Anup, if you are still happy with it,
> please reply with another Reviewed-by:.  Thanks,

You can keep my Reviewed-by. I did not see any functional
changes in the patch so I am fine.

Thanks,
Anup
diff mbox series

Patch

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index f8f996916c5b..d7820764122c 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -88,7 +88,9 @@  _start_kernel:
 
 #ifdef CONFIG_SMP
 	li t0, CONFIG_NR_CPUS
-	bgeu a0, t0, .Lsecondary_park
+	blt a0, t0, .Lgood_cores
+	tail .Lsecondary_park
+.Lgood_cores:
 #endif
 
 	/* Pick one hart to run the main boot sequence */
@@ -217,11 +219,6 @@  relocate:
 	tail smp_callin
 #endif
 
-.align 2
-.Lsecondary_park:
-	/* We lack SMP support or have too many harts, so park this hart */
-	wfi
-	j .Lsecondary_park
 END(_start)
 
 #ifdef CONFIG_RISCV_M_MODE
@@ -303,6 +300,13 @@  ENTRY(reset_regs)
 END(reset_regs)
 #endif /* CONFIG_RISCV_M_MODE */
 
+.section ".text", "ax",@progbits
+.align 2
+.Lsecondary_park:
+	/* We lack SMP support or have too many harts, so park this hart */
+	wfi
+	j .Lsecondary_park
+
 __PAGE_ALIGNED_BSS
 	/* Empty zero page */
 	.balign PAGE_SIZE