| Message ID | 1579602095-30060-5-git-send-email-manish.narani@xilinx.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 2a2b821607aea16c9c20f9f4d45096dc860fd33a |
| Headers | show |
| Series | Enhancements and Bug Fixes in ZynqMP SDHCI | expand |
On 21/01/20 12:21 pm, Manish Narani wrote: > This patch removes quirk which indicates a broken base clock. This was > making the kernel report wrong base clock of ~187MHz instead of 200MHz > even as the measurement on the hardware was showing 200MHz. > > Signed-off-by: Manish Narani <manish.narani@xilinx.com> > State: pending Huh? Otherwise: Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > drivers/mmc/host/sdhci-of-arasan.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index 39176ab5ca1f..0146d7dd315b 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -358,6 +358,17 @@ static struct sdhci_arasan_of_data sdhci_arasan_data = { > .pdata = &sdhci_arasan_pdata, > }; > > +static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = { > + .ops = &sdhci_arasan_ops, > + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | > + SDHCI_QUIRK2_STOP_WITH_TC, > +}; > + > +static struct sdhci_arasan_of_data sdhci_arasan_zynqmp_data = { > + .pdata = &sdhci_arasan_zynqmp_pdata, > +}; > + > static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask) > { > int cmd_error = 0; > @@ -553,7 +564,7 @@ static const struct of_device_id sdhci_arasan_of_match[] = { > }, > { > .compatible = "xlnx,zynqmp-8.9a", > - .data = &sdhci_arasan_data, > + .data = &sdhci_arasan_zynqmp_data, > }, > { /* sentinel */ } > }; >
On 03. 02. 20 12:31, Adrian Hunter wrote: > On 21/01/20 12:21 pm, Manish Narani wrote: >> This patch removes quirk which indicates a broken base clock. This was >> making the kernel report wrong base clock of ~187MHz instead of 200MHz >> even as the measurement on the hardware was showing 200MHz. >> >> Signed-off-by: Manish Narani <manish.narani@xilinx.com> >> State: pending > > Huh? It shouldn't be here. It is internal patch labeling. Manish: Please send v2 with all lines you got and remove this above. > > Otherwise: > > Acked-by: Adrian Hunter <adrian.hunter@intel.com> These patches requires firmware changes. Feel free to take it directly via your tree. If you want me to take it via arm-soc tree please let me know. Thanks, Michal
On Tue, 4 Feb 2020 at 12:42, Michal Simek <michal.simek@xilinx.com> wrote: > > On 03. 02. 20 12:31, Adrian Hunter wrote: > > On 21/01/20 12:21 pm, Manish Narani wrote: > >> This patch removes quirk which indicates a broken base clock. This was > >> making the kernel report wrong base clock of ~187MHz instead of 200MHz > >> even as the measurement on the hardware was showing 200MHz. > >> > >> Signed-off-by: Manish Narani <manish.narani@xilinx.com> > >> State: pending > > > > Huh? > > It shouldn't be here. It is internal patch labeling. > Manish: Please send v2 with all lines you got and remove this above. No need for a resend, I can fix this before applying, which will be when rc1 is out. > > > > > Otherwise: > > > > Acked-by: Adrian Hunter <adrian.hunter@intel.com> > > These patches requires firmware changes. Feel free to take it directly > via your tree. If you want me to take it via arm-soc tree please let me > know. Thanks, I pick them up via my mmc tree then. Kind regards Uffe
On 04. 02. 20 13:29, Ulf Hansson wrote: > On Tue, 4 Feb 2020 at 12:42, Michal Simek <michal.simek@xilinx.com> wrote: >> >> On 03. 02. 20 12:31, Adrian Hunter wrote: >>> On 21/01/20 12:21 pm, Manish Narani wrote: >>>> This patch removes quirk which indicates a broken base clock. This was >>>> making the kernel report wrong base clock of ~187MHz instead of 200MHz >>>> even as the measurement on the hardware was showing 200MHz. >>>> >>>> Signed-off-by: Manish Narani <manish.narani@xilinx.com> >>>> State: pending >>> >>> Huh? >> >> It shouldn't be here. It is internal patch labeling. >> Manish: Please send v2 with all lines you got and remove this above. > > No need for a resend, I can fix this before applying, which will be > when rc1 is out. > >> >>> >>> Otherwise: >>> >>> Acked-by: Adrian Hunter <adrian.hunter@intel.com> >> >> These patches requires firmware changes. Feel free to take it directly >> via your tree. If you want me to take it via arm-soc tree please let me >> know. > > Thanks, I pick them up via my mmc tree then. ok. Please let me know if there is any conflict. It should be simple add. Thanks, Michal
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 39176ab5ca1f..0146d7dd315b 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -358,6 +358,17 @@ static struct sdhci_arasan_of_data sdhci_arasan_data = { .pdata = &sdhci_arasan_pdata, }; +static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = { + .ops = &sdhci_arasan_ops, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | + SDHCI_QUIRK2_STOP_WITH_TC, +}; + +static struct sdhci_arasan_of_data sdhci_arasan_zynqmp_data = { + .pdata = &sdhci_arasan_zynqmp_pdata, +}; + static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask) { int cmd_error = 0; @@ -553,7 +564,7 @@ static const struct of_device_id sdhci_arasan_of_match[] = { }, { .compatible = "xlnx,zynqmp-8.9a", - .data = &sdhci_arasan_data, + .data = &sdhci_arasan_zynqmp_data, }, { /* sentinel */ } };
This patch removes quirk which indicates a broken base clock. This was making the kernel report wrong base clock of ~187MHz instead of 200MHz even as the measurement on the hardware was showing 200MHz. Signed-off-by: Manish Narani <manish.narani@xilinx.com> State: pending --- drivers/mmc/host/sdhci-of-arasan.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)