| Message ID | 1580838148-2981-1-git-send-email-jcrouse@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 56d977d5610bc6a83cf5f2d69cec91f3a2b91f77 |
| Headers | show |
| Series | drm/msm/a6xx: Remove unneeded GBIF unhalt | expand |
+jstultz On Tue, Feb 4, 2020 at 9:42 AM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > Commit e812744c5f95 ("drm: msm: a6xx: Add support for A618") added a > universal GBIF un-halt into a6xx_start(). This can cause problems for > a630 targets which do not use GBIF and might have access protection > enabled on the region now occupied by the GBIF registers. > > But it turns out that we didn't need to unhalt the GBIF in this path > since the stop function already takes care of that after executing a flush > but before turning off the headswitch. We should be confident that the > GBIF is open for business when we restart the hardware. > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > --- > > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 ------------ > 1 file changed, 12 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index daf0780..e51c723 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -378,18 +378,6 @@ static int a6xx_hw_init(struct msm_gpu *gpu) > struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); > int ret; > > - /* > - * During a previous slumber, GBIF halt is asserted to ensure > - * no further transaction can go through GPU before GPU > - * headswitch is turned off. > - * > - * This halt is deasserted once headswitch goes off but > - * incase headswitch doesn't goes off clear GBIF halt > - * here to ensure GPU wake-up doesn't fail because of > - * halted GPU transactions. > - */ > - gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0); > - > /* Make sure the GMU keeps the GPU on while we set it up */ > a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); > > -- > 2.7.4
On Tue, Feb 4, 2020 at 9:42 AM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > Commit e812744c5f95 ("drm: msm: a6xx: Add support for A618") added a > universal GBIF un-halt into a6xx_start(). This can cause problems for > a630 targets which do not use GBIF and might have access protection > enabled on the region now occupied by the GBIF registers. > > But it turns out that we didn't need to unhalt the GBIF in this path > since the stop function already takes care of that after executing a flush > but before turning off the headswitch. We should be confident that the > GBIF is open for business when we restart the hardware. > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Sorry, yesterday got busy with other things and I didn't get around to testing your patch, but I have tested earlier with my own patch which is identical: https://git.linaro.org/people/john.stultz/android-dev.git/commit/?h=dev/db845c-mainline-WIP&id=4e6a2e84dd77fe74faa1a6b797eb0ee7bf11ffd7 So, I think I can safely add: Tested-by: John Stultz <john.stultz@linaro.org> Thanks so much for the quick turnaround on this! -john
On Tue, Feb 4, 2020 at 9:42 AM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > Commit e812744c5f95 ("drm: msm: a6xx: Add support for A618") added a > universal GBIF un-halt into a6xx_start(). This can cause problems for > a630 targets which do not use GBIF and might have access protection > enabled on the region now occupied by the GBIF registers. > > But it turns out that we didn't need to unhalt the GBIF in this path > since the stop function already takes care of that after executing a flush > but before turning off the headswitch. We should be confident that the > GBIF is open for business when we restart the hardware. > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Fixes: e812744c5f95 ("drm: msm: a6xx: Add support for A618") > --- > > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 ------------ > 1 file changed, 12 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index daf0780..e51c723 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -378,18 +378,6 @@ static int a6xx_hw_init(struct msm_gpu *gpu) > struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); > int ret; > > - /* > - * During a previous slumber, GBIF halt is asserted to ensure > - * no further transaction can go through GPU before GPU > - * headswitch is turned off. > - * > - * This halt is deasserted once headswitch goes off but > - * incase headswitch doesn't goes off clear GBIF halt > - * here to ensure GPU wake-up doesn't fail because of > - * halted GPU transactions. > - */ > - gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0); > - > /* Make sure the GMU keeps the GPU on while we set it up */ > a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); > > -- > 2.7.4
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index daf0780..e51c723 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -378,18 +378,6 @@ static int a6xx_hw_init(struct msm_gpu *gpu) struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); int ret; - /* - * During a previous slumber, GBIF halt is asserted to ensure - * no further transaction can go through GPU before GPU - * headswitch is turned off. - * - * This halt is deasserted once headswitch goes off but - * incase headswitch doesn't goes off clear GBIF halt - * here to ensure GPU wake-up doesn't fail because of - * halted GPU transactions. - */ - gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0); - /* Make sure the GMU keeps the GPU on while we set it up */ a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);
Commit e812744c5f95 ("drm: msm: a6xx: Add support for A618") added a universal GBIF un-halt into a6xx_start(). This can cause problems for a630 targets which do not use GBIF and might have access protection enabled on the region now occupied by the GBIF registers. But it turns out that we didn't need to unhalt the GBIF in this path since the stop function already takes care of that after executing a flush but before turning off the headswitch. We should be confident that the GBIF is open for business when we restart the hardware. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 ------------ 1 file changed, 12 deletions(-)