| Message ID | 20200202125950.1825013-5-aford173@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V2,1/5] spi: fspi: enable fspi on imx8qxp and imx8mm | expand |
On Sun, Feb 02, 2020 at 06:59:50AM -0600, Adam Ford wrote: > Pull in upstream patch from NXP repo to: > enable fspi in imx8mm DT file > > Signed-off-by: Han Xu <han.xu@nxp.com> > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > V2: Reorder s-o-b lines to give credit in proper order. > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > index 1e5e11592f7b..679769fe6cab 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > @@ -558,7 +558,21 @@ aips3: bus@30800000 { > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > - ranges = <0x30800000 0x30800000 0x400000>; > + ranges = <0x30800000 0x30800000 0x400000>, > + <0x8000000 0x8000000 0x10000000>; > + > + flexspi: spi@30bb0000 { Keep the node sort in unit-address. Shawn > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "nxp,imx8mm-fspi"; > + reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>; > + reg-names = "fspi_base", "fspi_mmap"; > + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8MM_CLK_QSPI_ROOT>, > + <&clk IMX8MM_CLK_QSPI_ROOT>; > + clock-names = "fspi", "fspi_en"; > + status = "disabled"; > + }; > > ecspi1: spi@30820000 { > compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; > -- > 2.24.0 >
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 1e5e11592f7b..679769fe6cab 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -558,7 +558,21 @@ aips3: bus@30800000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x30800000 0x30800000 0x400000>; + ranges = <0x30800000 0x30800000 0x400000>, + <0x8000000 0x8000000 0x10000000>; + + flexspi: spi@30bb0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,imx8mm-fspi"; + reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_QSPI_ROOT>, + <&clk IMX8MM_CLK_QSPI_ROOT>; + clock-names = "fspi", "fspi_en"; + status = "disabled"; + }; ecspi1: spi@30820000 { compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";