| Message ID | 1581698795-437-1-git-send-email-fabrice.gasnier@st.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 29e8c8253d7d5265f58122c0a7902e26df6c6f61 |
| Headers | show |
| Series | iio: trigger: stm32-timer: disable master mode when stopping | expand |
On Fri, 14 Feb 2020 17:46:35 +0100 Fabrice Gasnier <fabrice.gasnier@st.com> wrote: > Master mode should be disabled when stopping. This mainly impacts > possible other use-case after timer has been stopped. Currently, > master mode remains set (from start routine). > > Fixes: 6fb34812c2a2 ("iio: stm32 trigger: Add support for TRGO2 triggers") > > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> I 'think' this is tangential to the other changes to this driver recently and you seem to have prepared this against current mailine. Hence applied to the fixes-togreg branch of iio.git and marked for stable. Thanks, Jonathan > --- > drivers/iio/trigger/stm32-timer-trigger.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c > index 2e0d32a..2f82e8c 100644 > --- a/drivers/iio/trigger/stm32-timer-trigger.c > +++ b/drivers/iio/trigger/stm32-timer-trigger.c > @@ -161,7 +161,8 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv, > return 0; > } > > -static void stm32_timer_stop(struct stm32_timer_trigger *priv) > +static void stm32_timer_stop(struct stm32_timer_trigger *priv, > + struct iio_trigger *trig) > { > u32 ccer, cr1; > > @@ -179,6 +180,12 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv) > regmap_write(priv->regmap, TIM_PSC, 0); > regmap_write(priv->regmap, TIM_ARR, 0); > > + /* Force disable master mode */ > + if (stm32_timer_is_trgo2_name(trig->name)) > + regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2, 0); > + else > + regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS, 0); > + > /* Make sure that registers are updated */ > regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG); > } > @@ -197,7 +204,7 @@ static ssize_t stm32_tt_store_frequency(struct device *dev, > return ret; > > if (freq == 0) { > - stm32_timer_stop(priv); > + stm32_timer_stop(priv, trig); > } else { > ret = stm32_timer_start(priv, trig, freq); > if (ret)
diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c index 2e0d32a..2f82e8c 100644 --- a/drivers/iio/trigger/stm32-timer-trigger.c +++ b/drivers/iio/trigger/stm32-timer-trigger.c @@ -161,7 +161,8 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv, return 0; } -static void stm32_timer_stop(struct stm32_timer_trigger *priv) +static void stm32_timer_stop(struct stm32_timer_trigger *priv, + struct iio_trigger *trig) { u32 ccer, cr1; @@ -179,6 +180,12 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv) regmap_write(priv->regmap, TIM_PSC, 0); regmap_write(priv->regmap, TIM_ARR, 0); + /* Force disable master mode */ + if (stm32_timer_is_trgo2_name(trig->name)) + regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2, 0); + else + regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS, 0); + /* Make sure that registers are updated */ regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG); } @@ -197,7 +204,7 @@ static ssize_t stm32_tt_store_frequency(struct device *dev, return ret; if (freq == 0) { - stm32_timer_stop(priv); + stm32_timer_stop(priv, trig); } else { ret = stm32_timer_start(priv, trig, freq); if (ret)
Master mode should be disabled when stopping. This mainly impacts possible other use-case after timer has been stopped. Currently, master mode remains set (from start routine). Fixes: 6fb34812c2a2 ("iio: stm32 trigger: Add support for TRGO2 triggers") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> --- drivers/iio/trigger/stm32-timer-trigger.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)