| Message ID | 20200213040644.45858-10-Zhiqiang.Hou@nxp.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs | expand |
On Thu, Feb 13, 2020 at 12:06:40PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Check the Header Type and exit from the host driver initialization if > it is not in host mode. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk> > --- > V10: > - New patch separated from #10 of v9. > > .../pci/controller/mobiveil/pcie-mobiveil-host.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > index 44dd641fede3..db7028788d91 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > @@ -554,6 +554,16 @@ static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) > return mobiveil_pcie_integrated_interrupt_init(pcie); > } > > +static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie) > +{ > + u32 header_type; > + > + header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE); > + header_type &= 0x7f; > + > + return header_type == PCI_HEADER_TYPE_BRIDGE; > +} > + > int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) > { > struct mobiveil_root_port *rp = &pcie->rp; > @@ -569,6 +579,9 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) > return ret; > } > > + if (!mobiveil_pcie_is_bridge(pcie)) > + return -ENODEV; > + > /* parse the host bridge base addresses from the device tree file */ > ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, > &bridge->dma_ranges, NULL); > -- > 2.17.1 >
Hi Andrew, Thanks a lot for your review! Thanks, Zhiqiang > -----Original Message----- > From: Andrew Murray <amurray@thegoodpenguin.co.uk> > Sent: 2020年2月21日 1:31 > To: Z.q. Hou <zhiqiang.hou@nxp.com> > Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > bhelgaas@google.com; robh+dt@kernel.org; andrew.murray@arm.com; > arnd@arndb.de; mark.rutland@arm.com; l.subrahmanya@mobiveil.co.in; > shawnguo@kernel.org; m.karthikeyan@mobiveil.co.in; Leo Li > <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com; > catalin.marinas@arm.com; will.deacon@arm.com; Mingkai Hu > <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>; Xiaowei Bao > <xiaowei.bao@nxp.com> > Subject: Re: [PATCHv10 09/13] PCI: mobiveil: Add Header Type field check > > On Thu, Feb 13, 2020 at 12:06:40PM +0800, Zhiqiang Hou wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > > Check the Header Type and exit from the host driver initialization if > > it is not in host mode. > > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk> > > > --- > > V10: > > - New patch separated from #10 of v9. > > > > .../pci/controller/mobiveil/pcie-mobiveil-host.c | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > > b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > > index 44dd641fede3..db7028788d91 100644 > > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > > @@ -554,6 +554,16 @@ static int mobiveil_pcie_interrupt_init(struct > mobiveil_pcie *pcie) > > return mobiveil_pcie_integrated_interrupt_init(pcie); > > } > > > > +static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie) { > > + u32 header_type; > > + > > + header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE); > > + header_type &= 0x7f; > > + > > + return header_type == PCI_HEADER_TYPE_BRIDGE; } > > + > > int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) { > > struct mobiveil_root_port *rp = &pcie->rp; @@ -569,6 +579,9 @@ int > > mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) > > return ret; > > } > > > > + if (!mobiveil_pcie_is_bridge(pcie)) > > + return -ENODEV; > > + > > /* parse the host bridge base addresses from the device tree file */ > > ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, > > &bridge->dma_ranges, NULL); > > -- > > 2.17.1 > >
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index 44dd641fede3..db7028788d91 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -554,6 +554,16 @@ static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) return mobiveil_pcie_integrated_interrupt_init(pcie); } +static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie) +{ + u32 header_type; + + header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE); + header_type &= 0x7f; + + return header_type == PCI_HEADER_TYPE_BRIDGE; +} + int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) { struct mobiveil_root_port *rp = &pcie->rp; @@ -569,6 +579,9 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) return ret; } + if (!mobiveil_pcie_is_bridge(pcie)) + return -ENODEV; + /* parse the host bridge base addresses from the device tree file */ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, &bridge->dma_ranges, NULL);