| Message ID | 20200224050753.17784-3-lokeshvutla@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clocksource: timer-ti-dm: Misc fixes for omap dm timer | expand |
* Lokesh Vutla <lokeshvutla@ti.com> [200224 05:09]: > Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value > in Load register(OMAP_TIMER_LOAD_REG) into Counter register > (OMAP_TIMER_COUNTER_REG). > > omap_dm_timer_set_load() writes into trigger register every time load > register is updated. When timer is configured in pwm mode, this causes > disruption in current pwm cycle, which is not expected especially when > pwm is used as PPS signal for synchronized PTP clocks. So do not write > into trigger register on updating the period. This patch without patch 1/2 applied still works for me: Tested-by: Tony Lindgren <tony@atomide.com>
diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 40742715ed21..62b145ef3bb8 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -574,7 +574,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); - omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); /* Save the context */ timer->context.tclr = l; timer->context.tldr = load;
Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> --- drivers/clocksource/timer-ti-dm.c | 1 - 1 file changed, 1 deletion(-)