diff mbox series

[v5,10/16] hw/i386: Introduce apicid functions inside X86MachineState

Message ID 158326547677.40452.8049125270383618696.stgit@naples-babu.amd.com (mailing list archive)
State New, archived
Headers show
Series APIC ID fixes for AMD EPYC CPU model | expand

Commit Message

Babu Moger March 3, 2020, 7:57 p.m. UTC
Introduce model specific apicid functions inside X86MachineState.
These functions will be loaded from X86CPUDefinition.

Signed-off-by: Babu Moger <babu.moger@amd.com>
---
 hw/i386/x86.c         |    5 +++++
 include/hw/i386/x86.h |    9 +++++++++
 2 files changed, 14 insertions(+)

Comments

Igor Mammedov March 9, 2020, 2:34 p.m. UTC | #1
On Tue, 03 Mar 2020 13:57:56 -0600
Babu Moger <babu.moger@amd.com> wrote:

> Introduce model specific apicid functions inside X86MachineState.
> These functions will be loaded from X86CPUDefinition.
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>


> ---
>  hw/i386/x86.c         |    5 +++++
>  include/hw/i386/x86.h |    9 +++++++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/hw/i386/x86.c b/hw/i386/x86.c
> index 929b80c9c7..15b7815bb0 100644
> --- a/hw/i386/x86.c
> +++ b/hw/i386/x86.c
> @@ -911,6 +911,11 @@ static void x86_machine_initfn(Object *obj)
>      x86ms->smm = ON_OFF_AUTO_AUTO;
>      x86ms->max_ram_below_4g = 0; /* use default */
>      x86ms->smp_dies = 1;
> +
> +    x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx;
> +    x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid;
> +    x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids;
> +    x86ms->apicid_pkg_offset = apicid_pkg_offset;
>  }
>  
>  static void x86_machine_class_init(ObjectClass *oc, void *data)
> diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
> index 22babcb3bb..2643b57629 100644
> --- a/include/hw/i386/x86.h
> +++ b/include/hw/i386/x86.h
> @@ -65,6 +65,15 @@ typedef struct {
>  
>      OnOffAuto smm;
>  
> +    /* Apic id specific handlers */
> +    uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info,
> +                                    unsigned cpu_index);
> +    void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info,
> +                                 X86CPUTopoIDs *topo_ids);
> +    apic_id_t (*apicid_from_topo_ids)(X86CPUTopoInfo *topo_info,
> +                                      const X86CPUTopoIDs *topo_ids);
> +    uint32_t (*apicid_pkg_offset)(X86CPUTopoInfo *topo_info);
> +
>      /*
>       * Address space used by IOAPIC device. All IOAPIC interrupts
>       * will be translated to MSI messages in the address space.
> 
>
diff mbox series

Patch

diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 929b80c9c7..15b7815bb0 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -911,6 +911,11 @@  static void x86_machine_initfn(Object *obj)
     x86ms->smm = ON_OFF_AUTO_AUTO;
     x86ms->max_ram_below_4g = 0; /* use default */
     x86ms->smp_dies = 1;
+
+    x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx;
+    x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid;
+    x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids;
+    x86ms->apicid_pkg_offset = apicid_pkg_offset;
 }
 
 static void x86_machine_class_init(ObjectClass *oc, void *data)
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 22babcb3bb..2643b57629 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -65,6 +65,15 @@  typedef struct {
 
     OnOffAuto smm;
 
+    /* Apic id specific handlers */
+    uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info,
+                                    unsigned cpu_index);
+    void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info,
+                                 X86CPUTopoIDs *topo_ids);
+    apic_id_t (*apicid_from_topo_ids)(X86CPUTopoInfo *topo_info,
+                                      const X86CPUTopoIDs *topo_ids);
+    uint32_t (*apicid_pkg_offset)(X86CPUTopoInfo *topo_info);
+
     /*
      * Address space used by IOAPIC device. All IOAPIC interrupts
      * will be translated to MSI messages in the address space.