Message ID | 1583839922-22699-8-git-send-email-yibin.gong@nxp.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | add ecspi ERR009165 for i.mx6/7 soc family | expand |
On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote: > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and > i.mx8m/8mm still need this errata. Please refer to nxp official > errata document from https://www.nxp.com/ . > > For removing workaround on those chips. Add new i.mx6ul type. > > Signed-off-by: Robin Gong <yibin.gong@nxp.com> > Acked-by: Mark Brown <broonie@kernel.org> > --- > drivers/spi/spi-imx.c | 50 +++++++++++++++++++++++++++++++++++++++++++++----- > 1 file changed, 45 insertions(+), 5 deletions(-) > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c > index 842a86e..f7ee2ec 100644 > --- a/drivers/spi/spi-imx.c > +++ b/drivers/spi/spi-imx.c > @@ -57,6 +57,7 @@ enum spi_imx_devtype { > IMX35_CSPI, /* CSPI on all i.mx except above */ > IMX51_ECSPI, /* ECSPI on i.mx51 */ > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > }; > > struct spi_imx_data; > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { > bool has_slavemode; > unsigned int fifo_size; > bool dynamic_burst; > + /* > + * ERR009165 fixed or not: > + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf > + */ > + bool tx_glitch_fixed; > enum spi_imx_devtype devtype; > }; > > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d) > > static inline int is_imx51_ecspi(struct spi_imx_data *d) > { > - return d->devtype_data->devtype == IMX51_ECSPI; > + return d->devtype_data->devtype == IMX51_ECSPI || > + d->devtype_data->devtype == IMX6UL_ECSPI; > } Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. If you want to handle them equally somewhere then explicitly test for i.MX6ul *and* i.MX51 there. > > static inline int is_imx53_ecspi(struct spi_imx_data *d) > @@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); > spi_imx->spi_bus_clk = clk; > > - /* ERR009165: work in XHC mode as PIO */ > - if (spi_imx->usedma) > - ctrl &= ~MX51_ECSPI_CTRL_SMC; > + /* > + * ERR009165: work in XHC mode instead of SMC as PIO on the chips > + * before i.mx6ul. > + */ > + if (spi_imx->usedma) { > + if (spi_imx->devtype_data->tx_glitch_fixed) > + ctrl |= MX51_ECSPI_CTRL_SMC; > + else > + ctrl &= ~MX51_ECSPI_CTRL_SMC; > + } Changed again, but the PIO case still not honoured. This should look like if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) ctrl |= MX51_ECSPI_CTRL_SMC; else ctrl &= ~MX51_ECSPI_CTRL_SMC; > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); > > @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx) > { > u32 tx_wml = 0; > > + if (spi_imx->devtype_data->tx_glitch_fixed) > + tx_wml = spi_imx->wml; That explains the variable introduced in the last patch, ok. I have the impression that splitting up 06/13 and 07/13 into two patches doesn't make it easier to review. Sascha
On 2020/03/10 Sascha Hauer <s.hauer@pengutronix.de> wrote: > On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote: > > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and i.mx8m/8mm > > still need this errata. Please refer to nxp official errata document > > from > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx > p.com%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11a68c4 > 2f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C > 637194241755109112&sdata=xzIUP8qZkrlDXX0yjTcUNZB6zDrevTdHFg1o4 > PZZd8E%3D&reserved=0 . > > > > For removing workaround on those chips. Add new i.mx6ul type. > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com> > > Acked-by: Mark Brown <broonie@kernel.org> > > --- > > drivers/spi/spi-imx.c | 50 > > +++++++++++++++++++++++++++++++++++++++++++++----- > > 1 file changed, 45 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index > > 842a86e..f7ee2ec 100644 > > --- a/drivers/spi/spi-imx.c > > +++ b/drivers/spi/spi-imx.c > > @@ -57,6 +57,7 @@ enum spi_imx_devtype { > > IMX35_CSPI, /* CSPI on all i.mx except above */ > > IMX51_ECSPI, /* ECSPI on i.mx51 */ > > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > > }; > > > > struct spi_imx_data; > > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { > > bool has_slavemode; > > unsigned int fifo_size; > > bool dynamic_burst; > > + /* > > + * ERR009165 fixed or not: > > + * > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx > p.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyi > bin.gong%40nxp.com%7Cf73bfc11a68c42f5f6d308d7c4c96efa%7C686ea1d3bc > 2b4c6fa92cd99c5c301635%7C0%7C1%7C637194241755109112&sdata=m > uw4HL5nMDjREJwVd885Wrxka0moMaaZ%2BhJgsAgY3eo%3D&reserved= > 0 > > + */ > > + bool tx_glitch_fixed; > > enum spi_imx_devtype devtype; > > }; > > > > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct > > spi_imx_data *d) > > > > static inline int is_imx51_ecspi(struct spi_imx_data *d) { > > - return d->devtype_data->devtype == IMX51_ECSPI; > > + return d->devtype_data->devtype == IMX51_ECSPI || > > + d->devtype_data->devtype == IMX6UL_ECSPI; > > } > > Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. If you want > to handle them equally somewhere then explicitly test for i.MX6ul *and* > i.MX51 there. But all i.mx6 chips including i.MX53 ECSPI are almost same as i.MX51 ECSPI, and ERR00915 is fixed from i.mx6ul.... > > > > > static inline int is_imx53_ecspi(struct spi_imx_data *d) @@ -585,9 > > +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data > *spi_imx, > > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); > > spi_imx->spi_bus_clk = clk; > > > > - /* ERR009165: work in XHC mode as PIO */ > > - if (spi_imx->usedma) > > - ctrl &= ~MX51_ECSPI_CTRL_SMC; > > + /* > > + * ERR009165: work in XHC mode instead of SMC as PIO on the chips > > + * before i.mx6ul. > > + */ > > + if (spi_imx->usedma) { > > + if (spi_imx->devtype_data->tx_glitch_fixed) > > + ctrl |= MX51_ECSPI_CTRL_SMC; > > + else > > + ctrl &= ~MX51_ECSPI_CTRL_SMC; > > + } > > Changed again, but the PIO case still not honoured. This should look like > if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) > ctrl |= MX51_ECSPI_CTRL_SMC; > else > ctrl &= ~MX51_ECSPI_CTRL_SMC; > Okay, will fix in v7. > > > > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); > > > > @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data > > *spi_imx) { > > u32 tx_wml = 0; > > > > + if (spi_imx->devtype_data->tx_glitch_fixed) > > + tx_wml = spi_imx->wml; > > That explains the variable introduced in the last patch, ok. > > I have the impression that splitting up 06/13 and 07/13 into two patches > doesn't make it easier to review. But 06 is a errata for all i.mx6 legacy chips, while 07 is for i.mx6ul and newer chips which have been already fixed the HW issue. I think two patches are better. > > Sascha > > > -- > Pengutronix e.K. | > | > Steuerwalder Str. 21 | > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe > ngutronix.de%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11 > a68c42f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7 > C1%7C637194241755114106&sdata=DKe%2B2SynMv%2Be3rMBrO79ou6 > 5ADTwO03KRT%2FqsDbCWjc%3D&reserved=0 | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 > | > Amtsgericht Hildesheim, HRA 2686 | Fax: > +49-5121-206917-5555 |
On Tue, Mar 10, 2020 at 08:43:10AM +0000, Robin Gong wrote: > On 2020/03/10 Sascha Hauer <s.hauer@pengutronix.de> wrote: > > On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote: > > > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and i.mx8m/8mm > > > still need this errata. Please refer to nxp official errata document > > > from > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx > > p.com%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11a68c4 > > 2f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C > > 637194241755109112&sdata=xzIUP8qZkrlDXX0yjTcUNZB6zDrevTdHFg1o4 > > PZZd8E%3D&reserved=0 . > > > > > > For removing workaround on those chips. Add new i.mx6ul type. > > > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com> > > > Acked-by: Mark Brown <broonie@kernel.org> > > > --- > > > drivers/spi/spi-imx.c | 50 > > > +++++++++++++++++++++++++++++++++++++++++++++----- > > > 1 file changed, 45 insertions(+), 5 deletions(-) > > > > > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index > > > 842a86e..f7ee2ec 100644 > > > --- a/drivers/spi/spi-imx.c > > > +++ b/drivers/spi/spi-imx.c > > > @@ -57,6 +57,7 @@ enum spi_imx_devtype { > > > IMX35_CSPI, /* CSPI on all i.mx except above */ > > > IMX51_ECSPI, /* ECSPI on i.mx51 */ > > > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > > > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > > > }; > > > > > > struct spi_imx_data; > > > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { > > > bool has_slavemode; > > > unsigned int fifo_size; > > > bool dynamic_burst; > > > + /* > > > + * ERR009165 fixed or not: > > > + * > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx > > p.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyi > > bin.gong%40nxp.com%7Cf73bfc11a68c42f5f6d308d7c4c96efa%7C686ea1d3bc > > 2b4c6fa92cd99c5c301635%7C0%7C1%7C637194241755109112&sdata=m > > uw4HL5nMDjREJwVd885Wrxka0moMaaZ%2BhJgsAgY3eo%3D&reserved= > > 0 > > > + */ > > > + bool tx_glitch_fixed; > > > enum spi_imx_devtype devtype; > > > }; > > > > > > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct > > > spi_imx_data *d) > > > > > > static inline int is_imx51_ecspi(struct spi_imx_data *d) { > > > - return d->devtype_data->devtype == IMX51_ECSPI; > > > + return d->devtype_data->devtype == IMX51_ECSPI || > > > + d->devtype_data->devtype == IMX6UL_ECSPI; > > > } > > > > Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. If you want > > to handle them equally somewhere then explicitly test for i.MX6ul *and* > > i.MX51 there. > But all i.mx6 chips including i.MX53 ECSPI are almost same as i.MX51 ECSPI, and ERR00915 is fixed from i.mx6ul.... You introduce .devtype = IMX6UL_ECSPI in this series, so apparently it is *not* the same as IMX51_ECSPI, then please also don't introduce a function which claims they are the same. Sascha
On 2020/03/10 Sascha Hauer <s.hauer@pengutronix.de> wrote: > On Tue, Mar 10, 2020 at 08:43:10AM +0000, Robin Gong wrote: > > On 2020/03/10 Sascha Hauer <s.hauer@pengutronix.de> wrote: > > > On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote: > > > > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and > > > > i.mx8m/8mm still need this errata. Please refer to nxp official > > > > errata document from > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww > > > w.nx > > > > p.com%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11a68c4 > > > > 2f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C > > > > 637194241755109112&sdata=xzIUP8qZkrlDXX0yjTcUNZB6zDrevTdHFg1o4 > > > PZZd8E%3D&reserved=0 . > > > > > > > > For removing workaround on those chips. Add new i.mx6ul type. > > > > > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com> > > > > Acked-by: Mark Brown <broonie@kernel.org> > > > > --- > > > > drivers/spi/spi-imx.c | 50 > > > > +++++++++++++++++++++++++++++++++++++++++++++----- > > > > 1 file changed, 45 insertions(+), 5 deletions(-) > > > > > > > > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index > > > > 842a86e..f7ee2ec 100644 > > > > --- a/drivers/spi/spi-imx.c > > > > +++ b/drivers/spi/spi-imx.c > > > > @@ -57,6 +57,7 @@ enum spi_imx_devtype { > > > > IMX35_CSPI, /* CSPI on all i.mx except above */ > > > > IMX51_ECSPI, /* ECSPI on i.mx51 */ > > > > IMX53_ECSPI, /* ECSPI on i.mx53 and later */ > > > > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ > > > > }; > > > > > > > > struct spi_imx_data; > > > > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { > > > > bool has_slavemode; > > > > unsigned int fifo_size; > > > > bool dynamic_burst; > > > > + /* > > > > + * ERR009165 fixed or not: > > > > + * > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww > > > w.nx > p.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyi > > > > bin.gong%40nxp.com%7Cf73bfc11a68c42f5f6d308d7c4c96efa%7C686ea1d3bc > > > > 2b4c6fa92cd99c5c301635%7C0%7C1%7C637194241755109112&sdata=m > > > > uw4HL5nMDjREJwVd885Wrxka0moMaaZ%2BhJgsAgY3eo%3D&reserved= > > > 0 > > > > + */ > > > > + bool tx_glitch_fixed; > > > > enum spi_imx_devtype devtype; > > > > }; > > > > > > > > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct > > > > spi_imx_data *d) > > > > > > > > static inline int is_imx51_ecspi(struct spi_imx_data *d) { > > > > - return d->devtype_data->devtype == IMX51_ECSPI; > > > > + return d->devtype_data->devtype == IMX51_ECSPI || > > > > + d->devtype_data->devtype == IMX6UL_ECSPI; > > > > } > > > > > > Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. > > > If you want to handle them equally somewhere then explicitly test > > > for i.MX6ul *and* > > > i.MX51 there. > > But all i.mx6 chips including i.MX53 ECSPI are almost same as i.MX51 ECSPI, > and ERR00915 is fixed from i.mx6ul.... > > You introduce .devtype = IMX6UL_ECSPI in this series, so apparently it is *not* > the same as IMX51_ECSPI, then please also don't introduce a function which > claims they are the same. Okay, I'll add is_imx6ul_ecspi explicitly. > > Sascha > > -- > Pengutronix e.K. | > | > Steuerwalder Str. 21 | > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe > ngutronix.de%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Ca10f3fdc > 28084c1fe89a08d7c4d50531%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7 > C0%7C637194291506592966&sdata=aqMqER0j0fVbAiKqM1tzBuEVlhiVcVL > GnrSRhJvhDk8%3D&reserved=0 | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 > | > Amtsgericht Hildesheim, HRA 2686 | Fax: > +49-5121-206917-5555 |
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 842a86e..f7ee2ec 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -57,6 +57,7 @@ enum spi_imx_devtype { IMX35_CSPI, /* CSPI on all i.mx except above */ IMX51_ECSPI, /* ECSPI on i.mx51 */ IMX53_ECSPI, /* ECSPI on i.mx53 and later */ + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ }; struct spi_imx_data; @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { bool has_slavemode; unsigned int fifo_size; bool dynamic_burst; + /* + * ERR009165 fixed or not: + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf + */ + bool tx_glitch_fixed; enum spi_imx_devtype devtype; }; @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d) static inline int is_imx51_ecspi(struct spi_imx_data *d) { - return d->devtype_data->devtype == IMX51_ECSPI; + return d->devtype_data->devtype == IMX51_ECSPI || + d->devtype_data->devtype == IMX6UL_ECSPI; } static inline int is_imx53_ecspi(struct spi_imx_data *d) @@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); spi_imx->spi_bus_clk = clk; - /* ERR009165: work in XHC mode as PIO */ - if (spi_imx->usedma) - ctrl &= ~MX51_ECSPI_CTRL_SMC; + /* + * ERR009165: work in XHC mode instead of SMC as PIO on the chips + * before i.mx6ul. + */ + if (spi_imx->usedma) { + if (spi_imx->devtype_data->tx_glitch_fixed) + ctrl |= MX51_ECSPI_CTRL_SMC; + else + ctrl &= ~MX51_ECSPI_CTRL_SMC; + } writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx) { u32 tx_wml = 0; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx_wml = spi_imx->wml; /* * Configure the DMA register: setup the watermark * and enable DMA request. @@ -1012,6 +1028,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = { .devtype = IMX53_ECSPI, }; +static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = { + .intctrl = mx51_ecspi_intctrl, + .prepare_message = mx51_ecspi_prepare_message, + .prepare_transfer = mx51_ecspi_prepare_transfer, + .trigger = mx51_ecspi_trigger, + .rx_available = mx51_ecspi_rx_available, + .reset = mx51_ecspi_reset, + .setup_wml = mx51_setup_wml, + .fifo_size = 64, + .has_dmamode = true, + .dynamic_burst = true, + .has_slavemode = true, + .tx_glitch_fixed = true, + .disable = mx51_ecspi_disable, + .devtype = IMX6UL_ECSPI, +}; + static const struct platform_device_id spi_imx_devtype[] = { { .name = "imx1-cspi", @@ -1035,6 +1068,9 @@ static const struct platform_device_id spi_imx_devtype[] = { .name = "imx53-ecspi", .driver_data = (kernel_ulong_t) &imx53_ecspi_devtype_data, }, { + .name = "imx6ul-ecspi", + .driver_data = (kernel_ulong_t) &imx6ul_ecspi_devtype_data, + }, { /* sentinel */ } }; @@ -1047,6 +1083,7 @@ static const struct of_device_id spi_imx_dt_ids[] = { { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, }, { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, }, { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, }, + { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); @@ -1178,7 +1215,10 @@ static int spi_imx_dma_configure(struct spi_master *master) * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size * to speed up fifo filling as possible. */ - tx.dst_maxburst = spi_imx->devtype_data->fifo_size; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx.dst_maxburst = spi_imx->wml; + else + tx.dst_maxburst = spi_imx->devtype_data->fifo_size; ret = dmaengine_slave_config(master->dma_tx, &tx); if (ret) { dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);