| Message ID | 20200317093922.20785-5-lkundrak@v3.sk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | DT: Improve validation for Marvell SoCs | expand |
On Tue, Mar 17, 2020 at 10:38:58AM +0100, Lubomir Rintel wrote: > gpio-pxa uses two cell to encode the interrupt source: the pin number > and the trigger type. Adjust the device node accordingly. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi index c39d00fe07982..c6ac85e362d8a 100644 --- a/arch/arm/boot/dts/pxa168.dtsi +++ b/arch/arm/boot/dts/pxa168.dtsi @@ -94,7 +94,7 @@ gpio@d4019000 { resets = <&soc_clocks PXA168_CLK_GPIO>; interrupt-names = "gpio_mux"; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; ranges; gcb0: gpio@d4019000 {
gpio-pxa uses two cell to encode the interrupt source: the pin number and the trigger type. Adjust the device node accordingly. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> --- arch/arm/boot/dts/pxa168.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)