Message ID | 20200319075023.22151-4-tomi.valkeinen@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | CAL fixes and improvements | expand |
Tomi, Thanks for the patch. On 3/19/20 2:50 AM, Tomi Valkeinen wrote: > i913_errata() sets a bit to 1 in PHY_REG10, but for some reason uses > CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE for the bit value. The value of > that macro is 1, so it works, but is still wrong. > > Fix this to 1. > > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> > --- > drivers/media/platform/ti-vpe/cal.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c > index 76d55c76d938..c418296df0f8 100644 > --- a/drivers/media/platform/ti-vpe/cal.c > +++ b/drivers/media/platform/ti-vpe/cal.c > @@ -645,8 +645,7 @@ static void i913_errata(struct cal_dev *dev, unsigned int port) > { > u32 reg10 = reg_read(dev->cc[port], CAL_CSI2_PHY_REG10); > > - set_field(®10, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, > - CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); > + set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); > > cal_dbg(1, dev, "CSI2_%d_REG10 = 0x%08x\n", port, reg10); > reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10); >
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 76d55c76d938..c418296df0f8 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -645,8 +645,7 @@ static void i913_errata(struct cal_dev *dev, unsigned int port) { u32 reg10 = reg_read(dev->cc[port], CAL_CSI2_PHY_REG10); - set_field(®10, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, - CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); + set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); cal_dbg(1, dev, "CSI2_%d_REG10 = 0x%08x\n", port, reg10); reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10);