| Message ID | 20200401095732.23197-1-o.rempel@pengutronix.de (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | b1f4c209d84057b6d40b939b6e4404854271d797 |
| Headers | show |
| Series | net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 | expand |
On Wed, Apr 01, 2020 at 11:57:32AM +0200, Oleksij Rempel wrote: > The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set > for the values that comprise the fields, not zero-bits-set. > > This patch fixes the clock frequency configuration for ATH8030 and > ATH8035 Atheros PHYs by removing the erroneous "~". > > To reproduce this bug, configure the PHY with the device tree binding > "qca,clk-out-frequency" and remove the machine specific PHY fixups. > > Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") > Reported-by: Russell King <linux@armlinux.org.uk> Please replace this with: Reported-by: Russell King <rmk+kernel@armlinux.org.uk> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Thanks. > --- > drivers/net/phy/at803x.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c > index 481cf48c9b9e4..31f731e6df720 100644 > --- a/drivers/net/phy/at803x.c > +++ b/drivers/net/phy/at803x.c > @@ -425,8 +425,8 @@ static int at803x_parse_dt(struct phy_device *phydev) > */ > if (at803x_match_phy_id(phydev, ATH8030_PHY_ID) || > at803x_match_phy_id(phydev, ATH8035_PHY_ID)) { > - priv->clk_25m_reg &= ~AT8035_CLK_OUT_MASK; > - priv->clk_25m_mask &= ~AT8035_CLK_OUT_MASK; > + priv->clk_25m_reg &= AT8035_CLK_OUT_MASK; > + priv->clk_25m_mask &= AT8035_CLK_OUT_MASK; > } > } > > -- > 2.26.0.rc2 > >
From: Oleksij Rempel <o.rempel@pengutronix.de> Date: Wed, 1 Apr 2020 11:57:32 +0200 > The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set > for the values that comprise the fields, not zero-bits-set. > > This patch fixes the clock frequency configuration for ATH8030 and > ATH8035 Atheros PHYs by removing the erroneous "~". > > To reproduce this bug, configure the PHY with the device tree binding > "qca,clk-out-frequency" and remove the machine specific PHY fixups. > > Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") > Reported-by: Russell King <linux@armlinux.org.uk> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Applied with Reported-by: fixed and queued up for -stable, thanks.
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 481cf48c9b9e4..31f731e6df720 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -425,8 +425,8 @@ static int at803x_parse_dt(struct phy_device *phydev) */ if (at803x_match_phy_id(phydev, ATH8030_PHY_ID) || at803x_match_phy_id(phydev, ATH8035_PHY_ID)) { - priv->clk_25m_reg &= ~AT8035_CLK_OUT_MASK; - priv->clk_25m_mask &= ~AT8035_CLK_OUT_MASK; + priv->clk_25m_reg &= AT8035_CLK_OUT_MASK; + priv->clk_25m_mask &= AT8035_CLK_OUT_MASK; } }
The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not zero-bits-set. This patch fixes the clock frequency configuration for ATH8030 and ATH8035 Atheros PHYs by removing the erroneous "~". To reproduce this bug, configure the PHY with the device tree binding "qca,clk-out-frequency" and remove the machine specific PHY fixups. Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Reported-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- drivers/net/phy/at803x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)